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plugin: DBusSimplePlugin: Remove assert 

This assert triggered sometimes at the beginning of a simulation.
Since it's not really needed anymore, we can remove it.

Signed-off-by: Daniel Schultz <daniel.schultz@aesc-silicon.de>
This commit is contained in:
Daniel Schultz 2022-02-10 19:55:08 +01:00
parent 77e361e91e
commit 807aa98d37
1 changed files with 0 additions and 3 deletions
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3
src/main/scala/vexriscv/plugin/DBusSimplePlugin.scala
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@ -518,9 +518,6 @@ class DBusSimplePlugin(catchAddressMisaligned : Boolean = false,
} }
} }
if(rspStage != execute) assert(!(dBus.rsp.ready && input(MEMORY_ENABLE) && arbitration.isValid && arbitration.isStuck),"DBusSimplePlugin doesn't allow memory stage stall when read happend")
} }
//Reformat read responses, REGFILE_WRITE_DATA overriding //Reformat read responses, REGFILE_WRITE_DATA overriding