Cleaning

README.md

@@ -25,13 +25,13 @@ You can find two example of CPU instantiation in :
 - src/main/scala/VexRiscv/GenFull.scala
 - src/main/scala/VexRiscv/GenSmallest.scala
 
-To generate the corresponding RTL as a VexRiscv.v file, run :
+To generate the corresponding RTL as a VexRiscv.v file, run (it could take time the first time you run it):
 
 ```sh
-sbt run-main VexRiscv.GenFull
+sbt "run-main VexRiscv.GenFull"
 
 # or
-sbt run-main VexRiscv.GenSmallest
+sbt "run-main VexRiscv.GenSmallest"
 ```
 
 ## Tests

src/main/scala/VexRiscv/demo/Briey.scala

@@ -117,10 +117,6 @@ class Briey(config: BrieyConfig) extends Component{
     reset = resetCtrl.vgaReset
   )
 
-  val jtagClockDomain = ClockDomain(
-    clock = io.jtag.tck
-  )
-
   val axi = new ClockingArea(axiClockDomain) {
     val ram = Axi4SharedOnChipRam(
       dataWidth = 32,