Add VexRiscvBmbGenerator CsrPlugin withPrivilegedDebug assert

2022-11-28 16:30:47 +01:00 · 2022-11-28 16:30:47 +01:00 · fb084327da
parent eafeb5fe49
commit fb084327da
1 changed files with 4 additions and 1 deletions
--- a/src/main/scala/vexriscv/VexRiscvBmbGenerator.scala
+++ b/src/main/scala/vexriscv/VexRiscvBmbGenerator.scala
@ -143,7 +143,10 @@ case class VexRiscvBmbGenerator()(implicit interconnectSmp: BmbInterconnectGener
        softwareInterrupt load plugin.softwareInterrupt
        if (plugin.config.supervisorGen) externalSupervisorInterrupt load plugin.externalInterruptS
        withDebug.get match {
-          case DEBUG_RISCV => debugRiscv <> plugin.debugBus
+          case DEBUG_RISCV => {
+            assert(plugin.debugBus != null, "You need to enable CsrPluginConfig.withPrivilegedDebug")
+            debugRiscv <> plugin.debugBus
+          }
          case _ =>
        }
      }