Hardware
/
VexRiscv
mirror of https://github.com/SpinalHDL/VexRiscv.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity
1,602 Commits 39 Branches 2 Tags 15 MiB
Commit Graph

2 Commits

Author SHA1 Message Date
Frank Poppen ac1a6715d7 Improves the documentation for nativeJtag about Murax with BSCANE2 and OpenOCD. 2021-05-06 08:44:05 +02:00
Pradeep2004 1470069dbd
Create soc_init.cfg 2021-04-30 23:15:58 +02:00