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VexRiscv
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  • 4cea625790
         Merge 00ebc985b2 into 7f2bccbef2 Leon Schuermann 2024-12-02 05:45:28 +0000
  • cadc286df8
         Merge f11c75cf3b into 7f2bccbef2 Elliott.Wen 2024-12-02 05:44:57 +0000
  • 7f2bccbef2
         Merge pull request #434 from goekce/master master Dolu1990 2024-11-15 11:47:51 +0100
  • 41ea95f805 add argument for simulation frequency goekce 2024-11-14 18:12:11 +0100
  • bd39421664 fix indent goekce 2024-11-13 14:25:54 +0100
  • 110b2a1e00 make JtagNative signal visible in generated code goekce 2024-11-13 14:22:22 +0100
  • e0f4bacaf4 add Murax config with native jtag goekce 2024-11-13 11:31:17 +0100
  • 4cf81af23b
         Merge pull request #433 from 7FM/master Dolu1990 2024-11-11 17:54:46 +0100
  • 4b3af464dc
         Fix undriven signal 7FM 2024-11-11 15:27:27 +0100
  • 35cf16ea56
         Merge pull request #432 from goekce/master Dolu1990 2024-10-21 17:25:33 +0200
  • 67b2e94f82 Verilator requires at least c++14 goekce 2024-10-21 17:14:25 +0200
  • bd9e062abe Fix #429 sifive toolchain link Dolu1990 2024-09-23 08:44:43 +0200
  • 83606a9eb0 Fix CsrPlugin FPU access Dolu1990 2024-09-20 15:40:36 +0200
  • 7fac668e38 Fix CsrPlugin FPU access dev Dolu1990 2024-09-20 15:40:36 +0200
  • 8c1e69b872 Fix #430 Dolu1990 2024-09-20 11:40:28 +0200
  • 9dcf5c38c9 Fix #430 Dolu1990 2024-09-20 11:40:28 +0200
  • fd2d784298
         Merge pull request #427 from kivikakk/dbus-wishbone-read-size Dolu1990 2024-09-06 11:00:10 +0200
  • 545b8c3770 DBusSimplePlugin: don't force SEL to 1111 on read. Asherah Connor 2024-09-04 17:40:36 +0300
  • 0af9894e69
         Merge pull request #425 from dnltz/WIP/dnltz/bump-scala-and-spinalhdl Dolu1990 2024-09-02 08:54:12 +0200
  • 638cd8878d build.sbt: Bump SpinalHDL and Scala version Daniel Schultz 2024-09-02 07:20:57 +0200
  • 919f00125d
         Merge pull request #423 from craigjb/riscv-jtag-bscane2 Dolu1990 2024-08-27 09:59:24 +0200
  • 52a2e889d0 Document using EmbeddedRiscvJtag with BSCANE2 Craig Bishop 2024-08-26 17:43:28 -0700
  • bd7c4c3281 Add JTAG tunnel without TAP in EmbeddedRiscvJtag Craig Bishop 2024-08-26 17:21:42 -0700
  • 497aac7991 stoptime is now default true Dolu1990 2024-07-31 09:21:01 +0200
  • 49b3f9c205 Add EmbeddedRiscvJtag noTap with tunnel support Dolu1990 2024-07-17 16:11:56 +0200
  • 11ff576a8a
         Merge pull request #417 from bunnie/aes-zkn Dolu1990 2024-07-12 09:09:45 +0200
  • 840620e0cd cleanup comment bunnie 2024-07-11 19:06:23 +0800
  • 5e6f0f0a1c add aes-zkn variant of AES plugin bunnie 2024-07-11 19:04:46 +0800
  • 6d0d1784e8 DebugPlugin now export stopTime Dolu1990 2024-07-08 09:13:14 +0200
  • 6ff85ab3f0 Merge branch 'areaOpt' into dev Dolu1990 2024-07-04 09:38:25 +0200
  • a10a3962e7 Briey add privileged debug option Dolu1990 2024-06-24 18:19:14 +0200
  • 43936c14c4 Fix CsrPlugin debugStateB when no U/S Dolu1990 2024-06-24 18:18:03 +0200
  • 2073047272
         Merge pull request #413 from mrcmry/fix-case-sensitive-MHz Dolu1990 2024-06-21 11:17:14 +0200
  • 8968b5a3fa Fix Mhz -> MHz in Dhrystone benchmark report generation Marc Emery 2024-06-17 22:00:19 +0200
  • 7beb9887a6 Fix Mhz -> MHz in readme and comments Marc Emery 2024-06-17 21:46:29 +0200
  • 8c191a2824 Fix #412 tightly coupled HAS_SIDE_EFFECT fix Dolu1990 2024-06-17 10:04:12 +0200
  • ee95e562f1 Fix #412 tightly coupled HAS_SIDE_EFFECT fix Dolu1990 2024-06-17 10:04:12 +0200
  • 3ee790d25c
         Merge pull request #410 from MrJake222/fix-expose-mask Dolu1990 2024-06-05 15:44:25 +0200
  • 1175f195df Exposed write mask on default iBus MrJake222 2024-06-04 23:11:10 +0200
  • 625fc84379 Update sbt version Dolu1990 2024-06-04 19:54:04 +0200
  • 26e38b3325 Merge branch 'watchpoint' into dev Dolu1990 2024-04-04 10:51:43 +0200
  • 2cd19c89b1 Revert unwanted push IBusDBusCachedTightlyCoupledRam watchpoint Dolu1990 2024-02-12 12:47:31 +0100
  • 457ae5c7e5
         Merge pull request #399 from martijnbastiaan/wishbone-err Dolu1990 2024-03-29 12:40:17 +0100
  • 5f58e0c7c6 Handle `ERR` in `toWishbone` Martijn Bastiaan 2024-03-22 21:24:32 +0100
  • 0e4032c3d7
         Merge pull request #388 from jjjt-git/perf_counters Dolu1990 2024-03-26 12:12:11 +0100
  • 5148bbac17 fixed broken conditional generation Jacob Tilger 2024-03-22 09:37:54 +0100
  • 7b520aa685
         fix my bad conflict resolution Dolu1990 2024-03-22 09:13:58 +0100
  • 02ada2a2c9
         Merge branch 'dev' into perf_counters Dolu1990 2024-03-22 09:01:36 +0100
  • 7882b0fd01 Revert "removed counter config from demos" Jacob Tilger 2024-03-21 13:19:45 +0100
  • 6aeb6d4d43
         Merge pull request #397 from cherrypiejam/fix-smp-supervisor Dolu1990 2024-03-10 08:52:52 +0100
  • 26d6f61d49 Fix SMP compile-time error when disabling supervisor Gongqi Huang 2024-03-09 20:49:37 -0500
  • e52251d88c main.cpp more wno Dolu1990 2024-03-08 12:50:39 +0100
  • 25d13df1b4 Fix main.cpp syntax Dolu1990 2024-03-08 12:44:21 +0100
  • c250114cb8 Fix main.cpp syntax Dolu1990 2024-03-08 12:44:21 +0100
  • 55d6b2f597
         Merge pull request #394 from PythonLinks/master Dolu1990 2024-03-06 11:31:54 +0100
  • 7812bc6615 VexRiscvSmpCluster add more debug trigger options Dolu1990 2024-03-05 11:45:53 +0100
  • 68c0db3d51 Merge remote-tracking branch 'origin/dev' into dev Dolu1990 2024-03-05 11:41:16 +0100
  • 9834bba515 Merge branch 'watchpoint' into dev Dolu1990 2024-03-05 11:40:53 +0100
  • 1943b257f2 CsrPlugin now support L1 D$ address trigger via the debugTriggersLsu option Dolu1990 2024-03-05 11:19:34 +0100
  • 30871d3381
         Improved the paragraph about available configurations. PythonLinks 2024-03-05 09:57:41 +0100
  • 55566eb56f sync Dolu1990 2024-03-01 13:34:06 +0100
  • 495b6d936d better documentation Jacob Tilger 2024-02-29 15:40:03 +0100
  • ff2f9ef0c6 fixed cross-phase issue Jacob Tilger 2024-02-29 14:36:55 +0100
  • a947210d31 watchpoint improved Dolu1990 2024-02-28 12:29:43 +0100
  • 8b41101a09 v1 Dolu1990 2024-02-27 14:51:11 +0100
  • 3799ebfc67 litex add missing u in misa Dolu1990 2024-02-14 11:18:15 +0100
  • 3c191b19f4 litex smp add resetVector argument Dolu1990 2024-02-13 11:20:25 +0100
  • 0465422795 Litex smp add jtagTap option Dolu1990 2024-02-13 10:25:54 +0100
  • 7d980337e5 Bring VexRiscvLitexSmpClusterOpenSbi sim back to a functional state Dolu1990 2024-02-12 16:45:30 +0100
  • e77938abf3 Add missing scala test Dolu1990 2024-02-12 16:44:50 +0100
  • 8c87e5f353 Scala 2.12 as default Dolu1990 2024-02-12 13:21:48 +0100
  • 2d501fb136 Revert unwanted push IBusDBusCachedTightlyCoupledRam Dolu1990 2024-02-12 12:47:31 +0100
  • 9a8cdde9aa fixed NullPointerException on utimeAccess NONE Jacob Tilger 2024-02-06 17:04:57 +0100
  • aef4b4ab7e fixed demo configs Jacob Tilger 2024-02-05 14:04:20 +0100
  • ca82922d67 added tags to regs to avoid warning when no counters will be generated Jacob Tilger 2024-02-05 13:56:36 +0100
  • 659a8b1dbc readded legacy counters/timers Jacob Tilger 2024-02-05 13:48:09 +0100
  • fe5e6dd95b SpinalHDL 1.10.1 Dolu1990 2024-02-01 10:34:37 +0100
  • c06d7f5cb4 renamed utime to time & doc Jacob Tilger 2024-01-31 17:12:42 +0100
  • 6d3c518923 added Counter to full config Jacob Tilger 2024-01-31 16:53:25 +0100
  • d50a1bc327 final touches Jacob Tilger 2024-01-31 16:53:05 +0100
  • 6f578430ab added custom counters Jacob Tilger 2024-01-31 16:26:44 +0100
  • cff3bc39ea moved timer to CounterPlugin Jacob Tilger 2024-01-31 15:35:56 +0100
  • 5dd6ff2ea1 exposes privilege information Jacob Tilger 2024-01-31 15:30:50 +0100
  • d9d841d748 exposed debug-state to other plugins Jacob Tilger 2024-01-31 13:02:39 +0100
  • 20f638ea16 removed counter config from demos Jacob Tilger 2024-01-31 12:03:25 +0100
  • 248ad248f4 extracted existing counters to new plugin Jacob Tilger 2024-01-31 11:56:07 +0100
  • 7723afc083 VexRiscvBmbGenerator now export IBusDBusCachedTightlyCoupledRam Dolu1990 2024-01-31 11:47:58 +0100
  • 7a62d60ac2 added counter csr-addresses to constants Jacob Tilger 2024-01-30 20:58:34 +0100
  • 0effdecbe6 SpinalHDL 1.10.0 Dolu1990 2024-01-04 10:11:22 +0100
  • 35e5f4cad8
         Merge pull request #386 from davine47/add-mill Dolu1990 2023-12-21 20:13:41 +0100
  • 62577a7a11 Add mill to compile and test VexRiscv Jack Davine 2023-12-22 00:36:26 +0800
  • 7c6c7a6fe5 implement #373 IBusDBusCachedTightlyCoupledRam hexInit ramOffset args Dolu1990 2023-11-25 14:16:35 +0100
  • 03471736e1 implement #373 IBusDBusCachedTightlyCoupledRam hexInit ramOffset args Dolu1990 2023-11-25 14:16:35 +0100
  • b6118e5cc2
         Merge pull request #378 from lschuermann/pmp-napot-rename Dolu1990 2023-11-14 12:40:29 +0100
  • 6734c7b0a5 Merge branch 'master' into dev Dolu1990 2023-11-14 11:37:16 +0100
  • 940fb507a5 fix #376 Uncached dbus ahb, add option to ensure no combinatorial loop Dolu1990 2023-11-14 11:35:56 +0100
  • 17915162f3 TestIndividualFeatures: test both PmpPlugin and PmpPluginNapot Leon Schuermann 2023-11-13 13:55:18 -0500
  • cdd8454349 Rename PmpPlugin -> PmpPluginNapot, PmpPluginOld -> PmpPlugin Leon Schuermann 2023-11-13 13:55:10 -0500
  • 1849aa4419
         Merge pull request #377 from Tectu/feature/fix-jtag Dolu1990 2023-11-13 09:02:50 +0100
  • ec31ed30cf Fix ambiguous function call to bind() Joel Bodenmann 2023-11-13 02:59:29 +0100