f4pga-examples/xc7/linux_litex_demo/Makefile

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Makefile
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current_dir := ${CURDIR}
TOP := top
SOURCES := ${current_dir}/baselitex_arty.v \
${current_dir}/VexRiscv_Linux.v
MEM_INIT := ${current_dir}/mem.init \
${current_dir}/mem_1.init \
${current_dir}/mem_2.init
PCF := ${current_dir}/arty.pcf
SDC := ${current_dir}/arty.sdc
XDC := ${current_dir}/arty.xdc
export
all:
cd ../../common && $(MAKE)
clean:
cd ../../common && $(MAKE) clean