Commit Graph

12 Commits

Author SHA1 Message Date
Unai Martinez-Corral 289f92c004 docs: use extlinks instead of raw refs
Signed-off-by: Unai Martinez-Corral <umartinezcorral@antmicro.com>
2022-02-21 20:08:07 +01:00
Karol Gugala d586f4a394 Docs: fix getting link
Signed-off-by: Karol Gugala <kgugala@antmicro.com>
2022-02-18 18:38:19 +01:00
Karol Gugala f0c5adcb75 Raname to F4PGA
Signed-off-by: Karol Gugala <kgugala@antmicro.com>
2022-02-18 18:15:44 +01:00
Joshua Fife 15e85e390c Created documentation and makefiles added proj-f to CI
Signed-off-by: Joshua Fife <jpfife17@gmail.com>
2021-10-09 12:26:59 -06:00
Joshua Fife 62850aaa99 Added explanation of symbiflow commands
Signed-off-by: Joshua Fife <jpfife17@gmail.com>
2021-07-02 12:08:32 -06:00
Joshua Fife b8a300db26 Changed some formatting, made naming consistent, and clarified info on SystemVerilog
Signed-off-by: Joshua Fife <jpfife17@gmail.com>
2021-06-30 09:21:21 -06:00
Brent Nelson a8590f707e Added links to new pages on main index page
Signed-off-by: Brent Nelson <nelson@ee.byu.edu>
2021-06-23 13:33:17 -06:00
Joshua Fife 1cafeeff8d Added instructions for Makefile
Signed-off-by: Joshua Fife <jpfife17@gmail.com>
2021-06-08 17:59:33 -06:00
Joshua Fife 52ba45644e Rough Draft
Signed-off-by: Joshua Fife <jpfife17@gmail.com>
2021-06-08 12:42:12 -06:00
Robert Winkler 29ba427094 docs: Update description
Signed-off-by: Robert Winkler <rwinkler@antmicro.com>
2020-12-14 14:45:55 +01:00
Robert Winkler f579ebfb8d ci: Extract tuttest runs from docker
Signed-off-by: Robert Winkler <rwinkler@antmicro.com>
2020-12-14 14:45:55 +01:00
Filip Kokosinski 2ddee57006 docs: Initial Sphinx setup
Signed-off-by: Filip Kokosinski <fkokosinski@antmicro.com>
2020-12-11 10:34:04 +01:00