FOSS Flow For FPGA
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Krzysztof Boroński d8d27d3216
ci: use extra verbose mode for f4pga build (#596)
Signed-off-by: Krzysztof Boronski <kboronski@antmicro.com>
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README.md

FOSS Flows For FPGA (F4PGA) project

'Automerge' workflow status

This is the top-level repository for the F4PGA project, which is a Workgroup under the CHIPS Alliance. The elements of the project include (but are not limited to):

F4PGA Workgroup

The F4PGA Workgroup consists of members from different backgrounds, including FPGA vendors (Xilinx and QuickLogic), industrial users (Google, Antmicro) and academia (University of Toronto), who collaborate to build a more open source and software-driven FPGA ecosystem (IP, tools and workflows) to drive the adoption of FPGAs in existing and new use cases, and eliminate barriers of entry.