modules: add DDR3-800 timings for MT41J128M16 and use it on arty example

This commit is contained in:
Florent Kermarrec 2018-10-01 11:59:54 +02:00
parent 426ae23d2a
commit 0f46dc4ab7
2 changed files with 9 additions and 1 deletions

View File

@ -8,7 +8,7 @@ core_config = {
# modules / phy
"sdram_module": MT41K128M16,
"sdram_module_nb": 1,
"sdram_module_speedgrade": "1066",
"sdram_module_speedgrade": "800",
"sdram_rank_nb": 1,
"sdram_phy": A7DDRPHY,

View File

@ -248,6 +248,14 @@ class MT41J128M16(SDRAMModule):
tCCD = (4, None)
tRRD = 10
# speedgrade related timings
# DDR3-800
tRP_800 = 13.1
tRCD_800 = 13.1
tWR_800 = 13.1
tRFC_800 = 64
tFAW_800 = (20, None)
tRC_800 = 50.625
tRAS_800 = 37.5
# DDR3-1066
tRP_1066 = 13.1
tRCD_1066 = 13.1