gen: fix with_wishbone
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@ -258,7 +258,7 @@ class LiteDRAMCore(SoCSDRAM):
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kwargs["with_uart"] = False
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kwargs["with_uart"] = False
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kwargs["with_timer"] = False
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kwargs["with_timer"] = False
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kwargs["with_ctrl"] = False
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kwargs["with_ctrl"] = False
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kwargs["with_wishbone"] = (cpu_type is None)
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kwargs["with_wishbone"] = (cpu_type != None)
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else:
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else:
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kwargs["l2_size"] = 0
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kwargs["l2_size"] = 0
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SoCSDRAM.__init__(self, platform, sys_clk_freq,
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SoCSDRAM.__init__(self, platform, sys_clk_freq,
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