Florent Kermarrec
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2d47363f46
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test/benchmark: Switch from soc_sdram (deprecated) to soc_core.
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2022-01-07 18:37:13 +01:00 |
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Florent Kermarrec
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ac825e5112
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add SPDX License identifier to header and specify file is part of LiteDRAM.
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2020-08-23 15:52:08 +02:00 |
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Florent Kermarrec
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378c4419c1
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frontend/bist: rename run/ready to run_cascade_in/run_cascade_out.
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2020-04-14 16:52:02 +02:00 |
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Florent Kermarrec
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b399ae2e36
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test/benchmark: default value of run is 1, no need to drive it.
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2020-04-14 13:00:39 +02:00 |
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Florent Kermarrec
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72d2bbf09d
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test/benchmarck: cleanup.
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2020-03-26 10:46:11 +01:00 |
Jędrzej Boczar
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92daf53ea2
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test: fix with_uart parameter (see litex/b29f443f)
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2020-03-12 14:16:21 +01:00 |
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enjoy-digital
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5fb2b011d8
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Merge pull request #146 from antmicro/jboc/benchmark
Benchmarks: Generate HTML summary and deploy it from Travis
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2020-02-18 13:26:20 +01:00 |
Piotr Binkowski
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f0be039a34
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test: add option to use sdram timing verifier in benchmarks
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2020-02-17 14:35:15 +01:00 |
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Jędrzej Boczar
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b7ed91d9f0
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test: suppress info log messages in benchmark runner
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2020-02-17 13:14:52 +01:00 |
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Jędrzej Boczar
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edf4ddb2f2
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test: add option to use multiple BIST generators/checkers
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2020-02-12 14:40:33 +01:00 |
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Jędrzej Boczar
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409b9922ea
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test: add random address generation in benchmarks
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2020-02-11 13:11:06 +01:00 |
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Jędrzej Boczar
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ff435fd26e
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test: add option to run benchmarks with alternating write/read
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2020-02-11 12:06:45 +01:00 |
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Jędrzej Boczar
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f9f86d507f
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test: update benchmark configuration to account for access pattern
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2020-02-05 12:54:33 +01:00 |
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Jędrzej Boczar
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fcbcd4d3fe
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test: add option to benchmark predefined access patterns
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2020-02-04 16:26:57 +01:00 |
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Jędrzej Boczar
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bae046f143
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test: add read/write latency benchmarks
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2020-02-03 16:59:12 +01:00 |
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Jędrzej Boczar
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502e6c663c
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test: add command line arguments for BIST base/length/random
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2020-01-28 15:03:36 +01:00 |
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Florent Kermarrec
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586eb39b1d
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test: add initial benchmark test
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2020-01-28 12:07:22 +01:00 |