c54fc4af82
Fix UpConverter write path not working as intended
...
LiteDRAM controler does not check if wdata stream has valid signal set,
it assumes that wdata has valid data when cmd is send.
Signed-off-by: Maciej Dudek <mdudek@antmicro.com>
2022-06-27 17:49:31 +02:00
d95212bf0b
test: check converters at higher data width ratios
2021-09-01 14:59:05 +02:00
ac825e5112
add SPDX License identifier to header and specify file is part of LiteDRAM.
2020-08-23 15:52:08 +02:00
22bd01c014
frontend/wishbone: simplify by reusing LiteDRAMNativePortConverter
2020-05-13 17:14:42 +02:00
9b90a56e07
frontend/adaptation: combine read/write port up-converters and extend tests
2020-05-11 14:56:39 +02:00
907ef73971
test/test_wishbone: add comments/cleanup.
2020-04-14 21:48:44 +02:00
966ebcbc41
test: cleanup/uniformize things between tests.
2020-04-13 19:38:29 +02:00
f19d92b67f
test: add wishbone tests with data width mismatch
2020-03-20 14:48:50 +01:00
7593b2d9b9
test: add basic wishbone test
2020-03-20 09:30:33 +01:00
Maciej Dudek
Jędrzej Boczar
Florent Kermarrec