7 commits

Author	SHA1	Message	Date
Florent Kermarrec	4d19620a37	litedram_gen: cleanup SDRAM PHY selection, remove plarform configuration parameter (can be deduced from PHY)	2020-01-27 18:20:16 +01:00
Stefan Schrijvers	340a796129	litedram_gen: add ecp5 support	2020-01-25 18:59:26 +01:00
Florent Kermarrec	61b19e2aaf	litedram_gen: improve flexibility to define user ports	2020-01-15 12:57:33 +01:00
Florent Kermarrec	db97203877	gen: use SoCCore with_wishbone parameter, do more replace in yml files before passing config to LiteDRAMCore	2019-09-23 12:55:14 +02:00
Florent Kermarrec	233191939e	gen: change CSR config names, switch to csr_expose/csr_align	2019-09-23 09:12:40 +02:00
Florent Kermarrec	d37a30e0d7	litedram_gen: add wishbone user port support	2019-09-03 23:47:08 +02:00
Florent Kermarrec	602ff8be81	examples: switch to YAML config files	2019-08-28 07:08:10 +02:00

Renamed from examples/genesys2_config.py (Browse further)