liteeth/liteeth
2021-07-15 19:53:17 +02:00
..
core core/udp/get_port: Simplify code by letting CDC/Converter automatically simplify the logic when CDC/Converter are not required. 2021-07-15 19:53:17 +02:00
frontend frontend/Etherbone: Use new LiteX's PacketFIFO. 2021-07-15 18:07:15 +02:00
mac mac/sram: Cosmetic cleanups. 2021-05-07 14:39:38 +02:00
phy phy: Add initial Ultrascale+ 1000BaseX PHY. 2021-07-02 12:59:00 +02:00
software software/dissector: merge bit.lua/etherbone.lua in a single script and enable dissector on UDP port 1234 (LiteX's default). 2020-11-24 19:40:18 +01:00
__init__.py init repo 2015-09-07 13:29:34 +02:00
common.py liteeth/common: add last_be signal on layouts (required for 32/64-bit datapath support). 2021-02-10 18:43:03 +01:00
crossbar.py add SPDX License identifier to header and specify file is part or LiteEth. 2020-08-23 16:07:12 +02:00
gen.py liteeth/gen: remove semi-colon (thanks @davidcorrigan714). 2021-01-27 08:35:38 +01:00