Commit Graph

19 Commits

Author SHA1 Message Date
Florent Kermarrec 01eabb2d0d example_design: update with litex and fix 2017-06-22 17:58:19 +02:00
Florent Kermarrec 2f625c58b2 update litex uart 2017-04-19 10:46:17 +02:00
Florent Kermarrec b1b9e61ecf gateware: complete refactoring (only keep essential features, now less than 200 LOCs :)
use new LiteX features and only keep one trigger, subsampler, cdc, converter and storage modules.

software still needs to be cleaned up.
2016-03-31 21:41:51 +02:00
Florent Kermarrec 7af786e47e example_designs: use new Vivado special overrides 2016-03-16 19:48:38 +01:00
Florent Kermarrec 83e06cad80 example_designs: change the way we build cores (ensure consistent IO naming) 2015-12-27 15:42:37 +01:00
Florent Kermarrec 21b76a1860 example_designs/make.py: do not use "-" in build_name 2015-12-12 16:51:35 +01:00
Florent Kermarrec d0b4688184 remove Counter module 2015-11-24 21:50:01 +01:00
Florent Kermarrec 7b8169d8d2 example_designs/test: fix test_logic_analyzer import 2015-11-24 15:10:03 +01:00
Florent Kermarrec 92c7af04db example_designs/targets/core: use new Pins from LiteX (allow int parameters) 2015-11-19 15:00:18 +01:00
Florent Kermarrec 577d83dc80 test: use new RemoteClient/RemoveServer provided by LiteX 2015-11-17 00:23:51 +01:00
Florent Kermarrec 24ef9d7ebe for now use our fork of migen 2015-11-13 15:46:08 +01:00
Florent Kermarrec 947d974d0a start adapting to new migen/litex 2015-11-12 01:04:28 +01:00
Florent Kermarrec 9cc05dfe33 example_designs/test/test_logic_analyzer: replace la with logic_analyzer 2015-09-27 19:26:22 +02:00
Florent Kermarrec 19140a853b example_designs/test/Makefile: add clean 2015-09-27 19:24:38 +02:00
Florent Kermarrec 7623739f5a change names of frontend modules: io --> inout, la--> logic_analyzer 2015-09-27 18:47:30 +02:00
Florent Kermarrec c436e160b6 example_designs/test: add Makefile and test on de0nano 2015-09-27 18:16:10 +02:00
Florent Kermarrec d4c4bb2c01 example_designs: add core example 2015-09-12 18:37:37 +02:00
Florent Kermarrec 820b444061 test/Makefile: add example_designs to test regression on example_designs (only generate hdl) 2015-09-12 16:54:25 +02:00
Florent Kermarrec 9393fee9f3 init repo 2015-09-09 08:24:08 +02:00