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targets/digilent_arty/spiflash: LiteSPI integration now provided by LiteX.
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1 changed files with 3 additions and 9 deletions
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@ -27,11 +27,6 @@ from litedram.phy import s7ddrphy
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from liteeth.phy.mii import LiteEthPHYMII
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from litespi.modules import S25FL128L
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from litespi.opcodes import SpiNorFlashOpCodes as Codes
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from litespi.phy.generic import LiteSPIPHY
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from litespi import LiteSPI
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# CRG ----------------------------------------------------------------------------------------------
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class _CRG(Module):
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@ -105,10 +100,9 @@ class BaseSoC(SoCCore):
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# Flash (through LiteSPI, experimental).
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if with_mapped_flash:
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self.submodules.spiflash_phy = LiteSPIPHY(platform.request("spiflash4x"), S25FL128L(Codes.READ_1_1_4))
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self.submodules.spiflash_mmap = LiteSPI(self.spiflash_phy, clk_freq=sys_clk_freq, mmap_endianness=self.cpu.endianness)
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spiflash_region = SoCRegion(origin=self.mem_map.get("spiflash", None), size=S25FL128L.total_size, cached=False)
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self.bus.add_slave(name="spiflash", slave=self.spiflash_mmap.bus, region=spiflash_region)
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from litespi.modules import S25FL128L
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from litespi.opcodes import SpiNorFlashOpCodes as Codes
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self.add_spi_flash(mode="4x", module=S25FL128L(Codes.READ_1_1_4), with_master=True)
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# Leds -------------------------------------------------------------------------------------
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if with_led_chaser:
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