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targets: Update targets that were still using argparse.ArgumentParser.

This commit is contained in:
Florent Kermarrec 2022-11-06 22:07:17 +01:00
parent 33b0400aed
commit 30723b1bb0
4 changed files with 10 additions and 6 deletions
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5
litex_boards/targets/arduino_mkrvidor4000.py
View File

@ -72,8 +72,9 @@ class BaseSoC(SoCCore):
# Build -------------------------------------------------------------------------------------------- # Build --------------------------------------------------------------------------------------------
def main(): def main():
parser = argparse.ArgumentParser(description="LiteX SoC on MKR Vidor 4000") from litex.build.parser import LiteXArgumentParser
parser.add_argument("--sys-clk-freq", default=48e6, help="System clock frequency.") parser = LiteXArgumentParser(platform=arduino_mkrvidor4000.Platform, description="LiteX SoC on MKR Vidor 4000")
parser.add_argument("--sys-clk-freq", default=48e6, help="System clock frequency.")
args = parser.parse_args() args = parser.parse_args()
soc = BaseSoC( soc = BaseSoC(

5
litex_boards/targets/avnet_aesku40.py
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@ -104,8 +104,9 @@ class BaseSoC(SoCCore):
# Build -------------------------------------------------------------------------------------------- # Build --------------------------------------------------------------------------------------------
def main(): def main():
parser = argparse.ArgumentParser(description="LiteX SoC on AESKU40") from litex.build.parser import LiteXArgumentParser
parser.add_argument("--sys-clk-freq", default=125e6, help="System clock frequency (default: 125MHz)") parser = LiteXArgumentParser(platform=avnet_aesku40.Platform, description="LiteX SoC on AESKU40")
parser.add_argument("--sys-clk-freq", default=125e6, help="System clock frequency (default: 125MHz)")
args = parser.parse_args() args = parser.parse_args()
soc = BaseSoC( soc = BaseSoC(

3
litex_boards/targets/isx_im1283.py
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@ -82,7 +82,8 @@ class BaseSoC(SoCCore):
# Build -------------------------------------------------------------------------------------------- # Build --------------------------------------------------------------------------------------------
def main(): def main():
parser = argparse.ArgumentParser(description="LiteX SoC on iM1283") from litex.build.parser import LiteXArgumentParser
parser = LiteXArgumentParser(platform=isx_im1283.Platform, description="LiteX SoC on iM1283")
parser.add_argument("--sys-clk-freq", default=80e6, help="System clock frequency") parser.add_argument("--sys-clk-freq", default=80e6, help="System clock frequency")
sdopts = parser.add_mutually_exclusive_group() sdopts = parser.add_mutually_exclusive_group()
sdopts.add_argument("--with-spi-sdcard", action="store_true", help="Enable SPI-mode SDCard support") sdopts.add_argument("--with-spi-sdcard", action="store_true", help="Enable SPI-mode SDCard support")

3
litex_boards/targets/machdyne_krote.py
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@ -109,7 +109,8 @@ class BaseSoC(SoCCore):
# Build -------------------------------------------------------------------------------------------- # Build --------------------------------------------------------------------------------------------
def main(): def main():
parser = argparse.ArgumentParser(description="LiteX SoC on Kr\xf6te") from litex.build.parser import LiteXArgumentParser
parser = LiteXArgumentParser(platform=machdyne_krote.Platform, description="LiteX SoC on Kr\xf6te")
parser.add_argument("--bios-flash-offset", default="0x021000", help="BIOS offset in SPI Flash (default: 0x21000)") parser.add_argument("--bios-flash-offset", default="0x021000", help="BIOS offset in SPI Flash (default: 0x21000)")
parser.add_argument("--sys-clk-freq", default=50e6, help="System clock frequency (default: 50MHz)") parser.add_argument("--sys-clk-freq", default=50e6, help="System clock frequency (default: 50MHz)")
parser.add_argument("--with-led-chaser", action="store_true", help="Enable LED Chaser.") parser.add_argument("--with-led-chaser", action="store_true", help="Enable LED Chaser.")