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fixed parser

This commit is contained in:
mkuhn99 2022-11-24 16:03:12 +01:00
parent 926ed21f0b
commit 53b6bf035a
1 changed files with 4 additions and 9 deletions
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13
litex_boards/targets/xilinx_zybo_z7.py
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@ -170,15 +170,10 @@ class BaseSoC(SoCCore):
def main(): def main():
from litex.build.parser import LiteXArgumentParser from litex.build.parser import LiteXArgumentParser
parser = LiteXArgumentParser(description="LiteX SoC on Zybo Z7") parser = LiteXArgumentParser(platform=digilent_zybo_z7.Platform, description="LiteX SoC on Zybo Z7")
target_group = parser.add_argument_group(title="Target options") parser.add_target_argument("--sys-clk-freq", default=125e6, type=float, help="System clock frequency.")
target_group.add_argument("--build", action="store_true", help="Build design.") parser.add_target_argument("--variant", default="z7-10", help="Board variant (z7-10 or z7-20).")
target_group.add_argument("--load", action="store_true", help="Load bitstream.") parser.add_target_argument("--with-ps7", action="store_true", help="Add the PS7 as slave for soft CPUs.")
target_group.add_argument("--sys-clk-freq", default=125e6, help="System clock frequency.")
target_group.add_argument("--variant", default="z7-10", help="Board variant (z7-10 or z7-20).")
target_group.add_argument("--with-ps7", action="store_true", help="Add the PS7 as slave for soft CPUs.")
builder_args(parser)
soc_core_args(parser)
args = parser.parse_args() args = parser.parse_args()
soc = BaseSoC( soc = BaseSoC(