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targets/digilent_arty: Add default value for CRG's with_mapped_flash.

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Otherwise break retro-compat on external design importing CRG without passing this new parameter.
This commit is contained in:
Florent Kermarrec 2021-07-02 09:33:06 +02:00
parent 1b65bad4c2
commit 7442639a5e
1 changed files with 1 additions and 1 deletions

2
litex_boards/targets/digilent_arty.py
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@ -34,7 +34,7 @@ from litespi import LiteSPI
# CRG ----------------------------------------------------------------------------------------------
class _CRG(Module):
def __init__(self, platform, sys_clk_freq, with_mapped_flash):
def __init__(self, platform, sys_clk_freq, with_mapped_flash=False):
self.rst = Signal()
self.clock_domains.cd_sys = ClockDomain()
self.clock_domains.cd_sys4x = ClockDomain(reset_less=True)