targets/de10nano: fix typo.

2020-07-26 12:01:11 +02:00 · 2020-07-26 12:01:11 +02:00 · eb8a484032
parent 2cef54a909
commit eb8a484032
1 changed files with 1 additions and 0 deletions
--- a/litex_boards/targets/de10nano.py
+++ b/litex_boards/targets/de10nano.py
@ -76,6 +76,7 @@ class BaseSoC(SoCCore):
        # SDR SDRAM --------------------------------------------------------------------------------
        if with_mister_sdram and not self.integrated_main_ram_size:
            sdrphy_cls = HalfRateGENSDRPHY if sdram_rate == "1:2" else GENSDRPHY
+            self.submodules.sdrphy = sdrphy_cls(platform.request("sdram"))
            self.add_sdram("sdram",
                phy                     = self.sdrphy,
                module                  = AS4C32M16(sys_clk_freq, sdram_rate),