Michael Betz
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c32e790421
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vc707: fix default clock frequency
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2021-02-19 22:47:18 -08:00 |
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Michael Betz
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7442c2dada
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vc707.py: clk156 add missing constraint
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2021-02-08 19:04:01 -08:00 |
Florent Kermarrec
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c093d0d0fc
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platforms: cleanup pass to uniformize comments/separators/orders.
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2020-11-03 10:48:57 +01:00 |
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Florent Kermarrec
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1781be166a
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general: add SPDX License identifier to header and specify files are part of LiteX-Boards.
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2020-08-23 15:00:17 +02:00 |
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Florent Kermarrec
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d34c3baf15
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prog: use different openocd config files for FT232/FT2232.
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2020-05-06 16:14:51 +02:00 |
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Florent Kermarrec
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1f88a9d5ec
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platforms: make sure clocks inputs are constraints on all platforms.
Also use new loose lookup_request to simplify constraints.
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2020-05-05 11:45:41 +02:00 |
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Florent Kermarrec
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ea0eda9f75
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platforms: make sure all Xilinx/Altera platforms have a create_programmer method, use OpenOCD on Spartan6 and 7-Series.
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2020-05-05 09:42:34 +02:00 |
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Florent Kermarrec
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2cf3c3e845
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platforms: cosmetic cleanups.
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2020-04-09 23:05:13 +02:00 |
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Florent Kermarrec
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b44885d222
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vc707: fix copyrights (Michael Betz is the initial author)
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2020-02-28 08:39:52 +01:00 |
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Florent Kermarrec
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3581df5af6
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vc707: cleanup platform/targets, remove Ethernet support (SGMII is not currently supported)
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2020-02-25 09:41:53 +01:00 |
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Florent Kermarrec
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88a1f80db1
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vc707/vcu118: use proper copyrights
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2020-02-25 09:03:52 +01:00 |
Fei Gao
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373e74f435
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add new board files for VC707 and VCU118, only specified limited ports for VCU118, including clock, reset and DDR4
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2020-02-24 14:20:47 -05:00 |