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7 Commits

Author SHA1 Message Date
Florent Kermarrec 00ff61baa9 targets: Simplify clock domains and remove useless reset_less. 
rst was not directly assigned/used on reset_less clock domains, so reset_less
property was not really useful. With the changes on stream.CDC, having a rst
(Even fixed at 0) is now mandatory on clock domains involved in the CDC, so this
also fixes targets.
 2022-04-01 11:30:38 +02:00
Florent Kermarrec 9d452b0d74 targets: Create target_group for target arguments. 2022-03-21 18:37:40 +01:00
Florent Kermarrec cc8da9d341 targets: Simplify imports and switch to LiteXSocArgumentParser. 
CPU parameters are now selectively exposed to the user:
./digilent_arty.py --cpu-type=vexriscv_smp --help will show VexRiscv-SMP parameters.
./digilent_arty.py --cpu-type=naxriscv --help will show NaxRiscv parameters.
 2022-03-21 16:59:40 +01:00
Florent Kermarrec 773444a7dd targets: Switch to get_bios_filename/get_bitstream_filename. 2022-03-17 09:21:05 +01:00
Florent Kermarrec fccb952c4b target: Remove ident_version=True no longer required. 2022-01-18 17:13:02 +01:00
Florent Kermarrec 7114911cea targets: --no-ident-version is now directly provided by LiteX, remove it on targets implementing it. 2022-01-18 16:47:38 +01:00
Florent Kermarrec 45cfe2be6b qmtech_ecp4ce15/ecp4ce55: Merge in qmtech_ecp4cex5. 
Defaults to ecp4ce15, ecp4ce55 can be selected with --variant=ecp4ce55.
 2022-01-14 09:33:29 +01:00