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1506 Commits

Author SHA1 Message Date
Sylvain Munaut cdb78efd3c adi_adrv2crr: Document I2C devices attached 
Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
 2022-03-23 20:42:30 +01:00
Sylvain Munaut 6c31f16df2 adi_adrv2crr: Fix I2C signal assignement 
Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
 2022-03-23 20:42:30 +01:00
Florent Kermarrec bb974ae1af decklink_quad_hdmi_recorder: Add pcie_lanes parameter and 4x/8x support. 2022-03-23 15:24:49 +01:00
Florent Kermarrec 73458ae9d7 decklink_quad_hdmi_recorder: Add Serial/UART pins. 2022-03-23 11:08:51 +01:00
enjoy-digital d399f33dda
Merge pull request #374 from smunaut/adrv2crr 
adi_adrv2crr: Upgrade part to speedgrade 2
 2022-03-23 09:09:57 +01:00
enjoy-digital 4ca527974b
Merge pull request #373 from goran-mahovlic/patch-1 
faster sdcard boot on 2.0
 2022-03-23 08:07:49 +01:00
Sylvain Munaut dc92584681 adi_adrv2crr: Upgrade part to speedgrade 2 
Even though the schematic and bom call for speedgrade 1, this was only for
the prototypes.

All productions units have been updated to speedgrade 2.

See this thread:
https://ez.analog.com/fpga/f/q-a/112356/adrv9009-zu11eg-speed-grade

And the official HDL project for the board:
https://github.com/analogdevicesinc/hdl/blob/master/projects/adrv9009zu11eg/adrv2crr_fmc/system_project.tcl#L16

Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
 2022-03-22 23:36:41 +01:00
Florent Kermarrec ce4b627e3c targets: Remove l2_size workaround (no longer required). 2022-03-22 19:13:23 +01:00
Goran Mahovlic 68c23e9251
faster sdcard boot on 2.0 2022-03-22 17:54:12 +01:00
Florent Kermarrec 2a206def0f targets/ecp5/ddr3: Uniformize cd_sys2x (reset_less). 2022-03-22 17:32:35 +01:00
Matt Johnston 53c221a1fa butterstick: set ethernet rx_delay to 0ns 
The Microchip KSZ9031RNX PHY on the Butterstick has a default 1.2ns
internal RX delay so we shouldn't add the default 2ns MAC delay.

In testing with Linux on vexriscv I haven't seen any difference either
way, but with liteeth in Microwatt I have seen 30%+ packet loss when
receiving from certain ethernet devices (RTL8153 and AX88179 usb-gige
adapters, a GS105 switch didn't show the problem). Setting RX delay=0
resolves the problem. A TX delay is still required by the PHY.
 2022-03-22 13:51:03 +08:00
John Simons b8b0aead28 Added basic support for Arduino MKR Vidor 4000 2022-03-21 18:54:29 -07:00
Florent Kermarrec 9d452b0d74 targets: Create target_group for target arguments. 2022-03-21 18:37:40 +01:00
Florent Kermarrec d90e260414 targets/digilent_atlys: Fix target. 2022-03-21 17:38:02 +01:00
Florent Kermarrec cc8da9d341 targets: Simplify imports and switch to LiteXSocArgumentParser. 
CPU parameters are now selectively exposed to the user:
./digilent_arty.py --cpu-type=vexriscv_smp --help will show VexRiscv-SMP parameters.
./digilent_arty.py --cpu-type=naxriscv --help will show NaxRiscv parameters.
 2022-03-21 16:59:40 +01:00
Florent Kermarrec eb8657f515 gsd_orangecrab: Revert dm_remapping (Useful when built with VexRiscv-SMP and native LiteDRAM interface). 2022-03-18 12:56:13 +01:00
Florent Kermarrec 3ebad7f7cc gsd_orangecrab/butterstick: Add assert on devices. 2022-03-18 10:44:21 +01:00
Florent Kermarrec 9faa805ab9 alinx_ax7010: Review/Cleanup. 2022-03-17 11:31:02 +01:00
enjoy-digital 3aa1042f5f
Merge pull request #367 from ggangliu/zynq_xc7z010 
Add ALINX AX7010 board support
 2022-03-17 09:52:04 +01:00
Florent Kermarrec 0f82db26da rcs_artic_term_bmc_card: Fix is -> ==. 2022-03-17 09:45:47 +01:00
Florent Kermarrec 496b2cfab9 targets/gowin: Switch to get_bitstream_filename. 2022-03-17 09:40:10 +01:00
Florent Kermarrec 773444a7dd targets: Switch to get_bios_filename/get_bitstream_filename. 2022-03-17 09:21:05 +01:00
Yonggang Liu 94786cae19
Update and rename xilinx_alinx_ax7010.py to alinx_ax7010.py 2022-03-17 11:24:24 +08:00
Yonggang Liu 0e7145b4a1
Update and rename xilinx_alinx_ax7010.py to alinx_ax7010.py 2022-03-17 11:21:42 +08:00
Florent Kermarrec 0745162a29 xilinx_zcu102: Review/Cleanup for consistency with others boards. 
Also remove INTERNAL_VREF constraints that are not yet useful (required for DRAM).
 2022-03-16 18:47:05 +01:00
enjoy-digital 8003dcdd02
Merge pull request #370 from jwfaye/jwfaye-patch-1 
add xilinx_zcu102 platform
 2022-03-16 18:39:54 +01:00
Joseph Faye adbcc2e547
add zcu102 target file 2022-03-16 15:55:37 +01:00
Joseph Faye f4a48e51d7
add xilinx_zcu102 platform 2022-03-16 15:37:02 +01:00
Yonggang Liu 9dad1cb244
Rename xilinx_zynq_xc7z010.py to xilinx_alinx_ax7010.py 2022-03-15 15:51:13 +08:00
Yonggang Liu 5365c7fce4
Rename xilinx_zynq_xc7z010.py to xilinx_alinx_ax7010.py 2022-03-15 15:50:09 +08:00
enjoy-digital a962d8249f
Merge pull request #366 from gsomlo/gls-nexys-video-sata-pll 
targets/nexys-video: Add support for sata pll refclk
 2022-03-13 12:30:58 +01:00
enjoy-digital 0ada1e7d55
Merge pull request #365 from antmicro/lpddr4-pin-fix 
lpddr4_test_board: Fix button pin
 2022-03-13 12:29:37 +01:00
Yonggang Liu 9c55773275
Add files via upload 
Add zynq_xc7z010 board support
 2022-03-12 12:33:41 +08:00
Yonggang Liu 4159faf48b
Add files via upload 
Adding zynq_xc7z010 board support
 2022-03-12 12:20:54 +08:00
Gabriel Somlo 9f9afeaafa targets/nexys-video: Add support for sata pll refclk 2022-03-11 14:40:21 -05:00
Robert Szczepanski 688377de7c lpddr4_test_board: Fix button pin 2022-03-11 15:59:43 +01:00
enjoy-digital 3b74673a93
Merge pull request #363 from curliph/master 
add Gowin programmer support
 2022-03-08 17:26:50 +01:00
Florent Kermarrec f52a915487 lambdaconcept_ecpix5: Add initial Video support at 640x480 (with Terminal/Framebuffer). 
I2C intialization code adapted from https://github.com/ultraembedded/ecpix-5.

Tested with:
- python3 -m litex_boards.targets.lambdaconcept_ecpix5 --cpu-type=firev --with-video-terminal --build --load
- python3 -m litex_boards.targets.lambdaconcept_ecpix5 --cpu-type=firev --with-video-framebuffer --build --load

        __   _ __      _  __
       / /  (_) /____ | |/_/
      / /__/ / __/ -_)>  <
     /____/_/\__/\__/_/|_|
   Build your hardware, easily!

 (c) Copyright 2012-2022 Enjoy-Digital
 (c) Copyright 2007-2015 M-Labs

 BIOS built on Mar  8 2022 15:34:22
 BIOS CRC passed (c7fe9ecd)

 Migen git sha1: ac70301
 LiteX git sha1: 7ebc7625

--=============== SoC ==================--
CPU:		FireV-STANDARD @ 75MHz
BUS:		WISHBONE 32-bit @ 4GiB
CSR:		32-bit data
ROM:		128KiB
SRAM:		8KiB
L2:		8KiB
SDRAM:		524288KiB 16-bit @ 300MT/s (CL-6 CWL-5)

--========== Initialization ============--
Initializing SDRAM @0x40000000...
Switching SDRAM to software control.
Read leveling:
  m0, b00: |01110000| delays: 02+-01
  m0, b01: |00000000| delays: -
  m0, b02: |00000000| delays: -
  m0, b03: |00000000| delays: -
  best: m0, b00 delays: 02+-01
  m1, b00: |01110000| delays: 02+-01
  m1, b01: |00000000| delays: -
  m1, b02: |00000000| delays: -
  m1, b03: |00000000| delays: -
  best: m1, b00 delays: 02+-01
Switching SDRAM to hardware control.
Memtest at 0x40000000 (2.0MiB)...
  Write: 0x40000000-0x40200000 2.0MiB
   Read: 0x40000000-0x40200000 2.0MiB
Memtest OK
Memspeed at 0x40000000 (Sequential, 2.0MiB)...
  Write speed: 13.6MiB/s
   Read speed: 23.4MiB/s

--============== Boot ==================--
Booting from serial...
Press Q or ESC to abort boot completely.
sL5DdSMmkekro
Timeout
No boot medium found

--============= Console ================--

litex> ident
Ident: LiteX SoC on ECPIX-5 2022-03-08 15:34:19
 2022-03-08 15:40:52 +01:00
Florent Kermarrec 39e4e211bb targets/decklink_mini_4k: Add build/use instructions. 2022-03-08 14:14:18 +01:00
curliph 2df7fd573c
Update sipeed_tang_nano_9k.py 
Add Gowin programmer support
 2022-03-08 14:04:28 +08:00
curliph 6eb906a2ca
Update sipeed_tang_nano_9k.py 
add Gowin programmer support
 2022-03-08 14:00:53 +08:00
curliph 4c9bc53a3c add Win/powershell and WSL support 2022-03-08 13:24:56 +08:00
Florent Kermarrec cadfde4d39 litex_acorn_baseboard: Add SerDes refclk and m2_tx/rx pins. 2022-03-07 18:41:53 +01:00
Florent Kermarrec e5fd58f1af README: Add adi_adrv2crr_fmc. 2022-03-07 09:26:24 +01:00
enjoy-digital 50cc75fd56
Merge pull request #361 from smunaut/adrv2crr 
adi_adrv2crr: Add support for the ADI ADRV2CRR with ADRV9009-ZU11EG SoM
 2022-03-07 09:24:36 +01:00
Florent Kermarrec 37783ff9fd colorlight_5a_75e: Fix _connectors_v6_0/j16 first pin (thanks @WhichWayWazzit). 2022-03-07 09:16:07 +01:00
Sylvain Munaut ec28ca8fa3 adi_adrv2crr: Add support for the ADI ADRV2CRR with ADRV9009-ZU11EG SoM 
This is a carrier board with a SoM mounted on it.
There is also an FMC connector that can accept another
AD-FMCOMMS8-EBZ to get two more ADRV9009 RFIC but support for
that is not added yet.

Note that the PCIe support requires :
 - Change the .xci in the litepcie to use the right Quad
 - Revert litex 3c34039b731b42e27e2ee6c8e399e5eb8f3a058f so the
   timing constrainst of litepcie apply correctly

Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
 2022-03-03 22:17:09 +01:00
Florent Kermarrec 0f2e13fdf7 sqrl_fk33: Add HBM2 support (from https://github.com/enjoy-digital/fk33_hbm2_test). 2022-03-03 17:34:48 +01:00
Florent Kermarrec 99a66274c8 xilinx_alveo_u280: Switch HBM2 to USPHBM2 now integrated in LiteX. 2022-03-03 16:11:48 +01:00
Florent Kermarrec b80c7a7843 targets/sqrl_acorn: write_latency_calibration now disabled by default, no longer required. 2022-03-03 15:50:53 +01:00