Commit Graph

1506 Commits

Author SHA1 Message Date
Florent Kermarrec c0e671919d sqrl_acorn: Downgrade to SATA Gen1 for now (allow lower sys_clk_freq and enough for current tests). 2022-02-09 19:10:12 +01:00
Florent Kermarrec d9b77c6f25 digilent_arty: Add --flash support. 2022-02-09 17:51:56 +01:00
Florent Kermarrec 4894926c40 xilinx_kv260: +x. 2022-02-09 16:01:51 +01:00
enjoy-digital 0c010d3d79
Merge pull request #347 from hplp/master
Alveo U280 with HBM now working for Linux
2022-02-09 07:44:36 +01:00
hubmartin 27b03df886
Add Lattice ECP5 VIP board + HDMI output board support 2022-02-08 21:47:58 +01:00
Sergiu Mosanu 27a7534568 Merge branch 'master' of github.com:hplp/litex-boards 2022-02-08 12:56:03 -05:00
Sergiu Mosanu 450a26f395 Merge branch 'master' of https://github.com/litex-hub/litex-boards 2022-02-08 12:55:09 -05:00
Sergiu Mosanu 7ed633dc4b add guideline for serial interface 2022-02-08 12:54:34 -05:00
Sergiu Mosanu 0d2336768d
Merge branch 'litex-hub:master' into master 2022-02-08 12:20:35 -05:00
Sergiu Mosanu 5a0f69502b enable use of HBM for linux boot 2022-02-08 12:18:38 -05:00
enjoy-digital 420b9cd68d
Merge pull request #346 from Arusekk/patch-1
Fix seven_seg pin assignment typo in DE1-SoC
2022-02-08 16:42:33 +01:00
Arusekk 5d52bc5461
Fix seven_seg pin assignment in DE1-SoC
Fixes quartus build error:
```
Error (171016): Can't place node "seven_seg5[6]" -- illegal location assignment PIN_AA2 File: /home/arusekk/src/fpga-proj/build/de1soc/gateware/de1soc.v Line: 49
```
2022-02-08 09:03:53 +01:00
Florent Kermarrec 18e8bec9d4 xilinx/kv260: Minor cleanup and add Build/Use instructions (from PR). 2022-02-07 08:12:43 +01:00
enjoy-digital 8621700916
Merge pull request #345 from sergachev/feature/xilinx_kv260
Add Xilinx KV260 support
2022-02-07 07:53:55 +01:00
enjoy-digital 365b37b31c
Merge pull request #344 from benstobbs/patch-1
Add 85F to help for orangecrab device
2022-02-07 07:45:41 +01:00
Ilia Sergachev 1d8c3789af add Xilinx KV260 support 2022-02-06 14:38:57 +01:00
Ben Stobbs 617fa26acd
Add 85F to help for orangecrab device
The 85F orangecrab board exists, and works fine when this option is set to 85F, but leaving it out of the help is a bit confusing.
2022-02-06 10:36:58 +00:00
Florent Kermarrec 346623fd06 trellisboard: Rename Video I2C to videoi2c. 2022-02-04 09:26:31 +01:00
Florent Kermarrec 6d4fe82179 trellisboard: Rename hdmi_i2c to i2c (to have access to i2c_scan in the BIOS). 2022-02-02 11:08:21 +01:00
Florent Kermarrec 0522d8b0c5 trellisboard: Update i2c.add_init call. 2022-02-02 10:59:54 +01:00
Florent Kermarrec 7f4d464f1b trellisboard: Add Video Terminal/Framebuffer support and use new I2C init feature to automatically configure TP410 at startup. 2022-02-02 09:52:12 +01:00
Sergiu Mosanu 53007b3cb6 ignore ip directory and files 2022-02-01 14:24:48 -05:00
Florent Kermarrec 4251cfa865 terasic_de0nano: Add Build/Use instructions with JTAG-UART. 2022-02-01 15:58:34 +01:00
Florent Kermarrec 4d45611935 targets: Replace JTAG Atlantic (Deprecated) with JTAG-UART. 2022-02-01 11:30:26 +01:00
enjoy-digital 4281beac18
Merge pull request #343 from jevinskie/jev/deca-eth
DECA: Add Ethernet and Etherbone support
2022-01-31 16:23:17 +01:00
enjoy-digital 9144cb44fb
Merge branch 'master' into jev/deca-eth 2022-01-31 16:22:58 +01:00
enjoy-digital 3a6cc889d4
Merge pull request #341 from jevinskie/jev/altera-jtag
Add JTAGbone support to Terasic DECA
2022-01-31 16:07:18 +01:00
Jevin Sweval fbd424fc48 DECA: Add Ethernet and Etherbone support
Also fixed pcf_en IO standard compared to golden Arrow project.
2022-01-29 15:15:53 -08:00
Jevin Sweval 9e5224ca49 Add JTAGbone support to Terasic DECA
Along the way I added UARTbone support to DECA as well for debugging.

Examples:

./terasic_deca.py --csr-csv csr.csv --with-jtagbone --build --load
litex_server --jtag --jtag-config ../prog/openocd_max10_blaster2.cfg
litex_term crossover

./terasic_deca.py --csr-csv csr.csv --uart-name jtag_uart --build --load
litex_term --jtag-config ../prog/openocd_max10_blaster2.cfg jtag
2022-01-27 14:13:58 -08:00
enjoy-digital 597e5ca142
Merge pull request #340 from trabucayre/digilent_z7_yosys-nextpnr_support
digilent arty z7: allows toolchain selection (PL only)
2022-01-26 21:20:19 +01:00
Gwenhael Goavec-Merou dd134a4b7d digilent arty z7: allows toolchain selection (PL only) 2022-01-26 07:30:06 +01:00
Florent Kermarrec 74395ca80b digilent_nexyx_video: Add default toolchain value to CRG (to avoid breaking existing designs). 2022-01-25 16:13:57 +01:00
Florent Kermarrec 624572f2e9 alinx_axu2gca: Review and do minor cosmetic changes. 2022-01-25 14:58:47 +01:00
enjoy-digital 367222c455
Merge pull request #339 from trabucayre/alinx_axu2cga
alinx_axu2gca: new board
2022-01-25 14:54:46 +01:00
Gwenhael Goavec-Merou 537f04a13d alinx_axu2gca: new board
Signed-off-by: Gwenhael Goavec-Merou <gwenhael.goavec-merou@trabucayre.com>
2022-01-25 07:35:42 +01:00
Florent Kermarrec 621d45cd9e digilent_arty: Review and improve CRG to avoid specific yosys+nextpnr code.
sys4x/sys4x_dqs/idelay clks can be disabled when integrated-main-ram is used.
2022-01-24 19:16:07 +01:00
enjoy-digital c2276c1e6d
Merge pull request #338 from suarezvictor/master
Add tweaks to Arty board to support yosys+nextpnr toolchain
2022-01-24 19:02:59 +01:00
Florent Kermarrec 1abb03e514 tang_nano_4k: Review/Cleanup:
- Revert abstractions on clk_name/period: Too much abstraction to avoid duplications makes the code more difficult to read.
ex:
  - When constraining clk27, frequency is already in the name.
  - In the target, we want to know we are using clk27 as the main clk.
  - We need a default sys_clk_freq for project only importing BaseSoC.
- Revert SPI Flash import (for consistency with other targets).
- Keep VexRiscv as default CPU since this target is able to run it and also for consistency with other targets.
2022-01-24 18:46:51 +01:00
enjoy-digital e357eb6d8f
Merge pull request #337 from sergachev/tang_nano_4k_emcu
Enable LiteX BIOS on ARM core on Tang nano 4K
2022-01-24 18:36:10 +01:00
Florent Kermarrec cc1b46f106 tang_nano_9k: Fix HyperRAM integration. 2022-01-24 18:35:12 +01:00
Victor Suarez Rovere db77ea5c7a Add tweaks to Arty board to support yosys+nextpnr toolchain 2022-01-24 02:06:34 -03:00
Ilia Sergachev f078e55bb1 tang nano 4k: fix removed default_clk_period, fix do_finalize signature 2022-01-23 16:47:20 +01:00
Ilia Sergachev 6238052b10 tang nano 4k: disable spi flash with gowin emcu, cleanup 2022-01-23 16:10:46 +01:00
Ilia Sergachev 6c81fc708c tang nano 4k: add memory regions, set default cpu 2022-01-23 13:05:51 +01:00
enjoy-digital 787f44e7d9
Merge pull request #336 from tcal-x/cmod-a7-flash
Digilent CMOD A7: add flash support.
2022-01-23 08:36:49 +01:00
enjoy-digital f9ac599d9b
Merge pull request #335 from Icenowy/tang9k_psram
sipeed_tang_nano_9k: enable copackaged PSRAM
2022-01-23 08:34:18 +01:00
Tim Callahan 6567af6f49 Digilent CMOD A7: add flash support.
Add both "--flash" and "--with-spi-flash"; tested on board.
4MB flash mapped at 0x00400000.

Signed-off-by: Tim Callahan <tcal@google.com>
2022-01-22 18:50:12 -08:00
Icenowy Zheng f533e7f8ba sipeed_tang_nano_9k: enable copackaged PSRAM
Also enable SPI SDCard which was pending by the lack of main_ram
previously.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
2022-01-23 03:37:03 +08:00
Florent Kermarrec e35b9b439f platforms/sipeed_tang_nano_9k: Fix copyrights and remove board diagram/description of the 4k. 2022-01-22 15:55:36 +01:00
enjoy-digital 999dbd572f
Merge pull request #334 from Icenowy/tang9k
sipeed_tang_nano_9k: new board
2022-01-22 15:49:08 +01:00