Commit Graph

29 Commits

Author SHA1 Message Date
Florent Kermarrec d73bd2f7ce targets/xilinx: add comment on sys_clk to pll.clkin false path. 2021-01-07 08:01:54 +01:00
Florent Kermarrec 1ac1c6857f targets/xilinx: add false path constraint between sys_clk and pll.clkin.
The SoC reset added recently creates a path between sys_clk and pll.clkin
clock domains that is reported by the tools but that can be safely ignored.
2021-01-07 00:02:46 +01:00
Florent Kermarrec 49e1c34dfd targets/acorn_cle_215: add SATA. 2020-11-18 19:14:18 +01:00
Florent Kermarrec d42af3ea19 targets: add --sys-clk-freq support to all targets. 2020-11-12 18:07:28 +01:00
Florent Kermarrec 843e724e3d targets/pcie: simplify using new LiteX's add_pcie method and enable it on all devices supported by LitePCIe. 2020-11-12 16:39:42 +01:00
Florent Kermarrec 7a9f175450 targets/pcie: remove force of csr_data_width to 32 (this is now the default) but just add a check on the pcie block. 2020-11-12 12:08:20 +01:00
Florent Kermarrec 4401fec1e6 targets: remove add_csr("crg") (no longer needed). 2020-11-12 11:54:11 +01:00
Florent Kermarrec bd4e92ad13 targets: cleanup, uniformize build arguments between targets. 2020-11-12 11:46:00 +01:00
Florent Kermarrec 2b17dc1b89 target: add rst signal to CRG to allow full reset of the SoC on reboot command. 2020-11-04 11:13:42 +01:00
Florent Kermarrec 814e7630e4 targets/xilinx: use generic name for idelay clk (avoid clk200, clk400, etc...) since we somtimes want to change it. 2020-10-13 12:10:29 +02:00
Florent Kermarrec 77ba49f2bb targets/pcie: update timing_constraints (now provided by the .xci). 2020-09-24 09:50:55 +02:00
Florent Kermarrec 1781be166a general: add SPDX License identifier to header and specify files are part of LiteX-Boards. 2020-08-23 15:00:17 +02:00
connorwk f328909578 Moved platform call inside of BaseSoC init for compatibility with linux-on-litex-vexriscv support. Added optional spi-sdcard support over P2 header. 2020-08-09 16:27:41 -04:00
Florent Kermarrec 869ceadacb targets: use platform.request_all on LedChaser. 2020-08-06 20:04:03 +02:00
Florent Kermarrec fe3ea805bc targets/pcie: make pcie optional (--with-pcie) and avoid forcing uart to crossover. 2020-06-30 18:44:00 +02:00
Florent Kermarrec fc22e28fe9 targets: replace PCIeSoC with BaseSoC. 2020-06-30 17:41:57 +02:00
Florent Kermarrec d28a0c4258 targets/pcie: remove DNA/XADC/ICAP that were only on PCIe targets.
DNA/XADC/ICAP are demonstrated in LitePCIe repository and should probably be added with
a add_xy method.
2020-06-30 17:37:24 +02:00
Florent Kermarrec e91a5d6b82 targets/pcie: remove soft reset. 2020-06-30 17:28:13 +02:00
Florent Kermarrec 9f83b6e3cf targets/acorn_cle_215: use new generate_litepcie_software functions and add --driver argument to generate driver. 2020-06-03 08:20:43 +02:00
Florent Kermarrec 091ec846a1 targets/acorn_cle_215: automatically copy software from litepcie and generate headers in kernel directory. 2020-06-02 20:09:45 +02:00
Florent Kermarrec 5aeb7d85e6 targets/acorn_cle_215: fix typo in description. 2020-05-21 10:18:06 +02:00
Florent Kermarrec eeba64d7b2 targets: use soc.build_name in load/flash bitstream. 2020-05-21 09:12:29 +02:00
Florent Kermarrec 482d7a6b95 targets/pcie: use 128-bit datapath and 8 max_pending_requests on pcie_x4 configurations. 2020-05-14 15:34:00 +02:00
Florent Kermarrec 2bb7fce5e3 targets/acorn_cle_215: add minimal instructions to reproduce the results. 2020-05-13 17:55:52 +02:00
Florent Kermarrec c7404e356f targets/acorn_cle_215: switch to MT41K512M16 (Acorn has a 1GB DDR3 vs 512MB on NiteFury). 2020-05-09 16:39:17 +02:00
Florent Kermarrec 6f22f082ff targets: add LedChaser on platforms with user_leds.
Default to Chaser mode and similar user interface than GPIOOut.
2020-05-08 22:16:13 +02:00
Florent Kermarrec f9939532b6 targets/pcie: update LitePCIe constraints. 2020-05-07 12:15:52 +02:00
Florent Kermarrec 59e8c2cd30 acorn_cle_215: add .bin generation and --flash argument, working on hardware :). 2020-05-06 12:27:07 +02:00
Florent Kermarrec a049fa6856 add Acorn CLE 215+ platform/target. 2020-05-06 07:53:55 +02:00