litex-boards/litex_boards/platforms
Skip Hansen 1ab46562bd Take Ethernet PHY out of reset so default clock is 125 Mhz (and baud rate is 115,200) 2020-05-25 10:11:03 -07:00
..
__init__.py Avoid Official/Partner/Community differentiation: use same directory for all platforms/targets. 2020-02-03 09:36:30 +01:00
ac701.py prog: use different openocd config files for FT232/FT2232. 2020-05-06 16:14:51 +02:00
acorn_cle_215.py prog: use different openocd config files for FT232/FT2232. 2020-05-06 16:14:51 +02:00
aller.py prog: use different openocd config files for FT232/FT2232. 2020-05-06 16:14:51 +02:00
alveo_u250.py platforms/alveo_u250: add clk300 clock constraints. 2020-05-24 11:18:30 +02:00
arty.py platforms/arty: add _sdcard_pmod_io. 2020-05-20 12:09:43 +02:00
arty_s7.py prog: use different openocd config files for FT232/FT2232. 2020-05-06 16:14:51 +02:00
avalanche.py platforms: make sure clocks inputs are constraints on all platforms. 2020-05-05 11:45:41 +02:00
c10lprefkit.py targets: add LedChaser on platforms with user_leds. 2020-05-08 22:16:13 +02:00
camlink_4k.py targets: add LedChaser on platforms with user_leds. 2020-05-08 22:16:13 +02:00
colorlight_5a_75b.py platforms: fix CI. 2020-05-05 16:01:43 +02:00
de0nano.py platforms: make sure clocks inputs are constraints on all platforms. 2020-05-05 11:45:41 +02:00
de1soc.py platforms: make sure clocks inputs are constraints on all platforms. 2020-05-05 11:45:41 +02:00
de2_115.py platforms: make sure clocks inputs are constraints on all platforms. 2020-05-05 11:45:41 +02:00
de10lite.py platforms: make sure clocks inputs are constraints on all platforms. 2020-05-05 11:45:41 +02:00
de10nano.py platforms: make sure clocks inputs are constraints on all platforms. 2020-05-05 11:45:41 +02:00
ecp5_evn.py platforms/ecp5_evn: rename spiflash1x to spiflash, rewrite hardware/configuration description and remove make_spiflash. 2020-05-19 15:29:25 +02:00
ecpix5.py platforms/ecpix5: set pullups on rx_data to advertise as RGMII mode. 2020-05-06 16:00:46 +02:00
fomu_evt.py platforms: make sure clocks inputs are constraints on all platforms. 2020-05-05 11:45:41 +02:00
fomu_hacker.py platforms: make sure clocks inputs are constraints on all platforms. 2020-05-05 11:45:41 +02:00
fomu_pvt.py platforms: make sure clocks inputs are constraints on all platforms. 2020-05-05 11:45:41 +02:00
forest_kitten_33.py forest_kitten_33: add minimal target and use es1. 2020-05-25 12:26:52 +02:00
genesys2.py prog: use different openocd config files for FT232/FT2232. 2020-05-06 16:14:51 +02:00
hadbadge.py platforms: make sure clocks inputs are constraints on all platforms. 2020-05-05 11:45:41 +02:00
icebreaker.py platforms: make sure clocks inputs are constraints on all platforms. 2020-05-05 11:45:41 +02:00
kc705.py prog: use different openocd config files for FT232/FT2232. 2020-05-06 16:14:51 +02:00
kcu105.py platforms: make sure clocks inputs are constraints on all platforms. 2020-05-05 11:45:41 +02:00
kx2.py prog: use different openocd config files for FT232/FT2232. 2020-05-06 16:14:51 +02:00
linsn_rv901t.py prog: use different openocd config files for FT232/FT2232. 2020-05-06 16:14:51 +02:00
machxo3.py platforms: make sure clocks inputs are constraints on all platforms. 2020-05-05 11:45:41 +02:00
marblemini.py paltforms/marblemini: add break_off_pmod. 2020-05-19 15:42:53 +02:00
mercury_xu5.py platforms: make sure clocks inputs are constraints on all platforms. 2020-05-05 11:45:41 +02:00
mimas_a7.py prog: use different openocd config files for FT232/FT2232. 2020-05-06 16:14:51 +02:00
minispartan6.py platforms: make sure all traditional platforms have a create_programmer method. 2020-05-05 13:34:57 +02:00
nereid.py prog: use different openocd config files for FT232/FT2232. 2020-05-06 16:14:51 +02:00
netv2.py platforms: fix CI. 2020-05-05 16:01:43 +02:00
nexys4ddr.py prog: use different openocd config files for FT232/FT2232. 2020-05-06 16:14:51 +02:00
nexys_video.py nexys_video: add usb_fifo pins. 2020-05-22 14:28:55 +02:00
orangecrab.py platforms: make sure clocks inputs are constraints on all platforms. 2020-05-05 11:45:41 +02:00
pano_logic_g2.py Take Ethernet PHY out of reset so default clock is 125 Mhz (and baud rate is 115,200) 2020-05-25 10:11:03 -07:00
pipistrello.py platforms: make sure all traditional platforms have a create_programmer method. 2020-05-05 13:34:57 +02:00
sp605.py prog: use different openocd config files for FT232/FT2232. 2020-05-06 16:14:51 +02:00
tagus.py prog: use different openocd config files for FT232/FT2232. 2020-05-06 16:14:51 +02:00
tinyfpga_bx.py platforms: make sure clocks inputs are constraints on all platforms. 2020-05-05 11:45:41 +02:00
trellisboard.py platforms: make sure all traditional platforms have a create_programmer method. 2020-05-05 13:34:57 +02:00
ulx3s.py platforms: make sure all traditional platforms have a create_programmer method. 2020-05-05 13:34:57 +02:00
vc707.py prog: use different openocd config files for FT232/FT2232. 2020-05-06 16:14:51 +02:00
vcu118.py platforms: make sure clocks inputs are constraints on all platforms. 2020-05-05 11:45:41 +02:00
versa_ecp5.py platforms: make sure all traditional platforms have a create_programmer method. 2020-05-05 13:34:57 +02:00
zcu104.py platforms: make sure clocks inputs are constraints on all platforms. 2020-05-05 11:45:41 +02:00