0ce7f8354c
python3 -m litex_boards.targets.limesdr_mini_v2 --csr-csv=csr.csv --build --load litex_server --jtag --jtag-config=openocd_limesdr_mini_v2.cfg litex_term crossover __ _ __ _ __ / / (_) /____ | |/_/ / /__/ / __/ -_)> < /____/_/\__/\__/_/|_| Build your hardware, easily! (c) Copyright 2012-2022 Enjoy-Digital (c) Copyright 2007-2015 M-Labs BIOS built on May 3 2022 18:59:46 BIOS CRC passed (5f29afcc) LiteX git sha1: a4cc859d --=============== SoC ==================-- CPU: VexRiscv @ 80MHz BUS: WISHBONE 32-bit @ 4GiB CSR: 32-bit data ROM: 128KiB SRAM: 8KiB --============== Boot ==================-- Booting from serial... Press Q or ESC to abort boot completely. sL5DdSMmkekro Timeout No boot medium found --============= Console ================-- litex> ident Ident: LiteX SoC on LimeSDR-Mini-V2 2022-05-03 18:59:29 |
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.. | ||
openocd_butterstick.cfg | ||
openocd_colorlight_5a_75b.cfg | ||
openocd_ecpix5.cfg | ||
openocd_evn_ecp5.cfg | ||
openocd_fpc_iii.cfg | ||
openocd_genesys2.cfg | ||
openocd_limesdr_mini_v2.cfg | ||
openocd_litex_acorn_baseboard.cfg | ||
openocd_marblemini.cfg | ||
openocd_max10_blaster.cfg | ||
openocd_max10_blaster2.cfg | ||
openocd_netv2_rpi.cfg | ||
openocd_nexys_video.cfg | ||
openocd_trellisboard.cfg | ||
openocd_versa_ecp5.cfg | ||
openocd_xc6_ft232.cfg | ||
openocd_xc6_ft2232.cfg | ||
openocd_xc7_ft232.cfg | ||
openocd_xc7_ft2232.cfg | ||
openocd_xc7_ft4232.cfg |