litex-boards/litex_boards
Icenowy Zheng 4ba5793822 sitlinv_stlv7325: remove unexistent COL/CRS pins
The COL and CRS pins of the Ethernet PHY is not connected on the board
at all, but assigned dummy positions in the platform definition, which
leads to Vivado warning when building.

Remove these pins from the platform definition.

Signed-off-by: Icenowy Zheng <uwu@icenowy.me>
2022-11-13 17:27:23 +08:00
..
platforms sitlinv_stlv7325: remove unexistent COL/CRS pins 2022-11-13 17:27:23 +08:00
prog Add initial LimeSDR Mini V2 support (With SoC + USB3 (FT245PHYSynchronous)). 2022-05-03 19:04:06 +02:00
targets sitlinv_stlv7325: fix ident string vendor name 2022-11-13 17:27:23 +08:00
__init__.py litex_boards: Remove short imports since not really longer useful and mess up Python imports. 2022-05-03 17:53:57 +02:00