Florent Kermarrec 5bd8c4d74f targets/trellisboard: use ECLKBRIDGECS to allow ECLK to reach all DDR banks (fixes Diamond build)		2019-11-01 10:52:56 +01:00
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__init__.py	import: allow importing directly from litex_boards.platforms or litex_boards.targets	2019-09-03 15:30:20 +02:00
aller.py	partner: aller/nereid/tagus fix copyright (Rohit Singh as main author), do some cosmetic	2019-09-02 11:43:30 +02:00
c10lprefkit.py	targets: use type="io" instead of io_region=True	2019-10-30 16:35:32 +01:00
fomu.py	targets: fomu: add USBSoC and default to heap placer	2019-09-17 17:08:05 +08:00
nereid.py	partner/targets/nereid: MT8KTF51264 now in LiteDRAM	2019-09-09 08:50:06 +02:00
netv2.py	targets: use type="io" instead of io_region=True	2019-10-30 16:35:32 +01:00
tagus.py	partner: aller/nereid/tagus fix copyright (Rohit Singh as main author), do some cosmetic	2019-09-02 11:43:30 +02:00
trellisboard.py	targets/trellisboard: use ECLKBRIDGECS to allow ECLK to reach all DDR banks (fixes Diamond build)	2019-11-01 10:52:56 +01:00
ulx3s.py	ulx3s: simplify SDRAM module selection	2019-10-13 21:15:22 +02:00