Florent Kermarrec 6cce07d9db tec0117: add spiflash4x pins, rework flash function to flash both bitstream/bios.		2021-02-01 13:31:44 +01:00
..
__init__.py
ac701.py	targets/ac701: rename --ethernet-phy to --eth-phy for consistency with others targets.	2021-01-08 18:50:01 +01:00
acorn_cle_215.py
aller.py
alveo_u250.py
arrow_sockit.py	sockit: Fix cable name, default to jtag_atlantic	2021-02-01 11:48:06 +07:00
arty.py	add etherbone ip address option for relevant boards	2021-01-08 18:44:31 +01:00
arty_s7.py
c10lprefkit.py	targets/c10lprefkit: fix default sys-clk-freq.	2021-01-12 16:15:52 +01:00
camlink_4k.py	camlink_4k: disable leds when serial is used (since pin is shared).	2021-01-25 12:19:29 +01:00
colorlight_5a_75x.py
colorlight_i5.py	colorlight_i5: Use tx_delay=0 for LiteEthPHYRGMII instead of target specifig bios initialization	2021-01-27 18:19:27 +09:00
crosslink_nx_evn.py
crosslink_nx_vip.py
de0nano.py
de1soc.py
de2_115.py
de10lite.py
de10nano.py
ecp5_evn.py
ecpix5.py	Add flash to SPI flash support for board ECPIX5 (needs update to openfpgaloader.py from litex to work)	2021-01-30 13:19:08 +01:00
fk33.py
fomu.py
fpc_iii.py	targets/fpc_iii: review/cleanup to increase similarities with others targets to ease maintenance.	2021-01-29 08:46:31 +01:00
genesys2.py
hadbadge.py
icebreaker.py
kc705.py
kcu105.py	add etherbone ip address option for relevant boards	2021-01-08 18:44:31 +01:00
kx2.py
linsn_rv901t.py
litefury.py
logicbone.py
mercury_xu5.py
mimas_a7.py
minispartan6.py
mist.py
nereid.py
netv2.py	netv2: add device variant to allow 100T as well	2021-01-28 13:19:53 +01:00
nexys4ddr.py	nexys4ddr: etherbone support	2021-01-15 12:14:40 -05:00
nexys_video.py
orangecrab.py	orangecrab: remove dm_remapping workaround: we are now using Wihsbone/L2 path with VexRiscv-SMP on this board.	2021-01-25 11:52:59 +01:00
pano_logic_g2.py	add etherbone ip address option for relevant boards	2021-01-08 18:44:31 +01:00
pipistrello.py
qmtech_ep4ce15.py
qmtech_wukong.py	add etherbone ip address option for relevant boards	2021-01-08 18:44:31 +01:00
redpitaya.py
sds1104xe.py	sds1104xe: defaults to Crossover UART.	2021-01-08 19:00:41 +01:00
simple.py
tagus.py
tec0117.py	tec0117: add spiflash4x pins, rework flash function to flash both bitstream/bios.	2021-02-01 13:31:44 +01:00
tinyfpga_bx.py
trellisboard.py
ulx3s.py	ULX3S: Make spiflash optionally accessible from the SoC, and bootable	2021-01-23 14:44:26 -06:00
vc707.py
vcu118.py
versa_ecp5.py	add etherbone ip address option for relevant boards	2021-01-08 18:44:31 +01:00
xcu1525.py
zcu104.py
ztex213.py	Support file for the ZTEX USB-FPGA Module 2.13	2021-01-30 05:19:18 -05:00
zybo_z7.py