745ebbbfa1
ISX iM1283 is a "simple eDP signal generator" which utilizes a XC7A100T FPGA, and come with a header populated with the FPGA's JTAG. This commit adds initial reverse engineered IOs including the DDR3 DRAM (which cannot work reliably @ DDR3-800, so the system clock is defaultly set to 80MHz now), two LEDs and SD slot. Signed-off-by: Icenowy Zheng <uwu@icenowy.me> |
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| __init__.py | ||