litex/misoclib/mem/litesata/doc/source/docs/simulation/index.rst

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.. _simulation-index:
========================
Simulation
========================
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.. note::
Please contribute to this document, or support us financially to write it.
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Simulations are available in ./lib/sata/test:
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- crc_tb
- scrambler_tb
- phy_datapath_tb
- link_tb
- command_tb
- bist_tb
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Models for all the layers of SATA and a simplified HDD model are provided.
To run a simulation, go to ./test and run:
- make <simulation_name>