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cpu/lm32: re-enable multiplier/divider in minimal variant (does not seem to work correctly on hardware otherwise)

This commit is contained in:
Florent Kermarrec 2018-09-12 06:02:23 +02:00
parent df3f003ecd
commit 07e4c183cd
2 changed files with 3 additions and 6 deletions
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4
litex/soc/cores/cpu/lm32/verilog/config_minimal/lm32_config.v
View File

@ -39,13 +39,13 @@
// in a pipelined one. The multi-cycle multiplier stalls the pipe // in a pipelined one. The multi-cycle multiplier stalls the pipe
// for 32 cycles. If both options are disabled, multiply operations // for 32 cycles. If both options are disabled, multiply operations
// are not supported. // are not supported.
//`define CFG_MC_MULTIPLY_ENABLED `define CFG_MC_MULTIPLY_ENABLED
//`define CFG_PL_MULTIPLY_ENABLED //`define CFG_PL_MULTIPLY_ENABLED
// Enable the multi-cycle divider. Stalls the pipe until the result // Enable the multi-cycle divider. Stalls the pipe until the result
// is ready after 32 cycles. If disabled, the divide operation is not // is ready after 32 cycles. If disabled, the divide operation is not
// supported. // supported.
//`define CFG_MC_DIVIDE_ENABLED `define CFG_MC_DIVIDE_ENABLED
// //

3
litex/soc/integration/cpu_interface.py
View File

@ -24,9 +24,6 @@ def get_cpu_mak(cpu, variant):
if cpu == "lm32": if cpu == "lm32":
assert not clang, "lm32 not supported with clang." assert not clang, "lm32 not supported with clang."
triple = "lm32-elf" triple = "lm32-elf"
if variant == "minimal":
cpuflags = "-mbarrel-shift-enabled -msign-extend-enabled"
else:
cpuflags = "-mbarrel-shift-enabled -mmultiply-enabled -mdivide-enabled -msign-extend-enabled" cpuflags = "-mbarrel-shift-enabled -mmultiply-enabled -mdivide-enabled -msign-extend-enabled"
clang = False clang = False
elif cpu == "or1k": elif cpu == "or1k":