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tools/litex_server.py: jtag/udp mode: add missing addr_width parameter

This commit is contained in:
Gwenhael Goavec-Merou 2023-12-09 06:08:53 +01:00
parent c1871eaf42
commit 08ff003178
1 changed files with 2 additions and 2 deletions
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4
litex/tools/litex_server.py
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@ -231,7 +231,7 @@ def main():
jtag_uart = JTAGUART(config=args.jtag_config, chain=int(args.jtag_chain))
jtag_uart.open()
print("[CommUART] port: JTAG / ", end="")
comm = CommUART(os.ttyname(jtag_uart.name), debug=args.debug)
comm = CommUART(os.ttyname(jtag_uart.name), debug=args.debug, addr_width=int(args.addr_width))
# UDP mode
elif args.udp:
@ -250,7 +250,7 @@ def main():
exit()
else:
print("[CommUDP] ip: {} / port: {} / ".format(udp_ip, udp_port), end="")
comm = CommUDP(udp_ip, udp_port, debug=args.debug)
comm = CommUDP(udp_ip, udp_port, debug=args.debug, addr_width=int(args.addr_width))
# PCIe mode
elif args.pcie: