soc/cores/spi_mmap: add read only slot count register

This commit is contained in:
Richard Tucker 2023-10-24 09:51:21 +11:00 committed by Andrew Dennison
parent 3477aeaca1
commit 2e67f6a1a3
1 changed files with 3 additions and 0 deletions

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@ -249,6 +249,9 @@ class SPICtrl(LiteXModule):
self._version = CSRStatus(size=32, description="""SPI Module Version.""",
reset=int.from_bytes(str.encode(version), 'little'))
self.slot_count = CSRStatus(size=32, description="""SPI Module Slot Count.""",
# Create TX/RX Control/Status registers.
self.tx_control = CSRStorage(fields=[
CSRField("enable", size=1, offset=0, values=[