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cpu/vexriscv/naxriscv: Use reserved_interrupts to reserved interrupt 0.

This commit is contained in:
Florent Kermarrec 2023-03-24 09:02:49 +01:00
parent 2d24f50844
commit 4dabf0a330
2 changed files with 9 additions and 8 deletions
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8
litex/soc/cores/cpu/naxriscv/core.py
View File

@ -91,6 +91,10 @@ class NaxRiscv(CPU):
flags += f" -DUART_POLLING" flags += f" -DUART_POLLING"
return flags return flags
# Reserved Interrupts.
@property
def reserved_interrupts(self):
return {"noirq": 0}
# Command line configuration arguments. # Command line configuration arguments.
@staticmethod @staticmethod
@ -181,10 +185,6 @@ class NaxRiscv(CPU):
i_peripheral_dbus_rresp = dbus.r.resp, i_peripheral_dbus_rresp = dbus.r.resp,
) )
# IRQs (Note: 0 is reserved as a "No IRQ").
self.interrupts.update({"uart" : 1})
self.interrupts.update({"timer0" : 2})
def set_reset_address(self, reset_address): def set_reset_address(self, reset_address):
self.reset_address = reset_address self.reset_address = reset_address

9
litex/soc/cores/cpu/vexriscv_smp/core.py
View File

@ -150,6 +150,11 @@ class VexRiscvSMP(CPU):
flags += f" -DUART_POLLING" flags += f" -DUART_POLLING"
return flags return flags
# Reserved Interrupts.
@property
def reserved_interrupts(self):
return {"noirq": 0}
# Cluster Name Generation. # Cluster Name Generation.
@staticmethod @staticmethod
def generate_cluster_name(): def generate_cluster_name():
@ -356,10 +361,6 @@ class VexRiscvSMP(CPU):
) )
] ]
# IRQs (Note: 0 is reserved as a "No IRQ").
self.interrupts.update({"uart" : 1})
self.interrupts.update({"timer0" : 2})
def set_reset_address(self, reset_address): def set_reset_address(self, reset_address):
self.reset_address = reset_address self.reset_address = reset_address
assert reset_address == 0x0000_0000 assert reset_address == 0x0000_0000