cpu/vexriscv/naxriscv: Use reserved_interrupts to reserved interrupt 0.

litex/soc/cores/cpu/naxriscv/core.py

@@ -91,6 +91,10 @@ class NaxRiscv(CPU):
         flags += f" -DUART_POLLING"
         return flags
 
+    # Reserved Interrupts.
+    @property
+    def reserved_interrupts(self):
+        return {"noirq": 0}
 
     # Command line configuration arguments.
     @staticmethod
@@ -181,10 +185,6 @@ class NaxRiscv(CPU):
             i_peripheral_dbus_rresp   = dbus.r.resp,
         )
 
-        # IRQs (Note: 0 is reserved as a "No IRQ").
-        self.interrupts.update({"uart"   : 1})
-        self.interrupts.update({"timer0" : 2})
-
     def set_reset_address(self, reset_address):
         self.reset_address = reset_address
 

litex/soc/cores/cpu/vexriscv_smp/core.py

@@ -150,6 +150,11 @@ class VexRiscvSMP(CPU):
         flags += f" -DUART_POLLING"
         return flags
 
+    # Reserved Interrupts.
+    @property
+    def reserved_interrupts(self):
+        return {"noirq": 0}
+
     # Cluster Name Generation.
     @staticmethod
     def generate_cluster_name():
@@ -356,10 +361,6 @@ class VexRiscvSMP(CPU):
                 )
             ]
 
-        # IRQs (Note: 0 is reserved as a "No IRQ").
-        self.interrupts.update({"uart"   : 1})
-        self.interrupts.update({"timer0" : 2})
-
     def set_reset_address(self, reset_address):
         self.reset_address = reset_address
         assert reset_address == 0x0000_0000