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bank: fix csrgen address decoder

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This commit is contained in:
Sebastien Bourdeauducq 2011-12-11 20:15:30 +01:00
parent 05d91c7104
commit 7582b76406
1 changed files with 1 additions and 1 deletions
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2
migen/bank/csrgen.py
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@ -16,7 +16,7 @@ class Bank:
comb = []
sync = []
comb.append(a(self._sel, self.interface.a_i[12:] == f.Constant(self.address, f.BV(4))))
comb.append(a(self._sel, self.interface.a_i[10:] == f.Constant(self.address, f.BV(4))))
nregs = len(self.description)
nbits = f.BitsFor(nregs-1)