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Build your hardware, easily!
37 commits 42 branches 14 tags 31 MiB
C 52.6%
Python 43.7%
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Sebastien Bourdeauducq 7582b76406 bank: fix csrgen address decoder
2011-12-11 20:15:30 +01:00
examples Corelogic conversion example 2011-12-08 21:25:05 +01:00
migen bank: fix csrgen address decoder 2011-12-11 20:15:30 +01:00
.gitignore Initial import, FHDL basic structure, divider example 2011-12-04 16:44:38 +01:00