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cores/cpu/vexriscv_smp: add standard variant (similar to Linux, avoid passing cpu-variant=linux when selection vexriscv_smp).

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This commit is contained in:
Florent Kermarrec 2020-12-30 14:41:54 +01:00
parent 7bcebf4cdd
commit a8ddbb190a
1 changed files with 2 additions and 1 deletions
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3
litex/soc/cores/cpu/vexriscv_smp/core.py
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@ -19,7 +19,8 @@ import os
CPU_VARIANTS = {
"linux": "VexRiscv",
"standard": "VexRiscv",
"linux": "VexRiscv", # Similar to standard.
}
class Open(Signal): pass