interconnect/axi/axi_lite: Add bursting property even if always False.
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@ -57,6 +57,7 @@ class AXILiteInterface:
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# -----------
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# -----------
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self.data_width = data_width
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self.data_width = data_width
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self.address_width = address_width
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self.address_width = address_width
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self.bursting = bursting
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self.addressing = addressing
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self.addressing = addressing
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self.clock_domain = clock_domain
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self.clock_domain = clock_domain
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