60d0c4ddd4
ci: Compile/Install Verilator from sources (Required for updated Vexriscv-SMP).
2022-06-27 18:53:02 +02:00
caced992ad
litex_setup: Remove pip3 install amaranth-yosys.
2022-03-24 10:33:10 +01:00
1935a2599f
workflows/ci: Use local version of litex_setup.
2022-03-24 10:17:08 +01:00
72b61155c7
workflows/ci: Checkout to /usr/litex.
2022-03-24 10:12:38 +01:00
a6e2a529dc
litex_setup: Add initial installs config support (minimal, standard, full).
...
Can be selected with --config=minimal/standard/full. This avoid installing all the
CPUs when only the popular ones will be used. Installation can be updated later
and switched to full installation with --config=full.
2022-01-05 13:56:35 +01:00
9329d3f092
litex_setup: nMigen has been renamed to Amaranth HDL.
2021-12-10 17:41:30 +00:00
cb9f0fb1b0
ci/test_cpu: Install OpenRISC GCC toolchain in CI and add mor1kx to test_cpu.
2021-10-26 15:45:43 +02:00
152bbd67ed
ci: GITHUB_ACTIONS export not currently required.
2021-10-26 12:24:56 +02:00
81da5c1bb6
ci: Increase similarities with LiteDRAM CI.
2021-10-26 12:15:13 +02:00
2886fe1701
Add bios test mode for CI ( #1076 )
...
* Add bios test mode for CI
This enables to test the booting of each CPU configurations with the bios in Verilator simulation.
2021-10-24 12:08:58 +02:00
49f8652f91
ci: Install meson (now required by picolibc).
2021-09-27 16:19:56 +02:00
6771ed0796
ci: migrate from Travis CI to Github Actions.
2020-11-24 15:55:49 +01:00
Florent Kermarrec
whitequark
Navaneeth Bhardwaj