Be compatible with original proprietary DP RAM instantiation. This is
needed for simulation, where r0 is initialized to zero in lm32_cpu.v.
Signed-off-by: Michael Walle <michael@walle.cc>
This function is fixed in ISE since version 14.1 (see AR #44586). If the
builtin function is used, the design can be simulated with Icarus Verilog.
Signed-off-by: Michael Walle <michael@walle.cc>
Michael Walle
Sebastien Bourdeauducq