Commit Graph

4 Commits

Author SHA1 Message Date
Florent Kermarrec 1281a463d6 litescope/bridge: create a generic wishbone bridge that can be used with different phys (the phy needs to provide a sink/source with 8bits data).
- we can now pass a phy to LiteScopeWishboneBridge
- LiteScopeUART2Wishbone is only a specific LiteScopeWishboneBridge
- UART mux is removed since complicated and no longer useful (we can now create easily virtual UART over Ethernet, USB or PCIe) or simply add another UART for debug.
2015-05-01 17:51:18 +02:00
Florent Kermarrec 5a930fe7cf lite* cores: changes permissions (+x) on make.py files and on litepcie init.sh file 2015-04-18 08:51:59 -04:00
Florent Kermarrec 341f635a85 litescope: add PCIe driver (mmap/Sysfs) and use it on litepcie example design 2015-04-18 13:58:20 +02:00
Florent Kermarrec d22d58c7cc add litepcie core 2015-04-17 13:45:01 +02:00