3461 commits

Author	SHA1	Message	Date
Florent Kermarrec	619cd8e695	avoid forking migen, we will add custom modules in litex/gen but will use upstream migen for common modules	2015-11-11 12:10:55 +01:00
Florent Kermarrec	3f43a49382	soc: merge with misoc 3fcc4f116c3292020cb811d179e45ae45990101b ... changes: -software/bios: remove dataflow -cores/identifier: replace with user-defined string -interconnect/CSRBankArray: support read-only mappings -targets: Added Numato Mimas V2 target -Our libunwind changes were merged upstream. -wishbone: update TODO -replace Counter in Converters -Fix CSRBankArray -flterm: properly exit on ^C.	2015-11-10 16:51:51 +01:00
Florent Kermarrec	3297210e48	boards/targets/sim: get SDRAM working in simulation with sdram/model	2015-11-10 12:57:23 +01:00
Florent Kermarrec	4afe4a07e4	soc/software: remove memtest (should be re-written)	2015-11-10 12:22:08 +01:00
Florent Kermarrec	6764c06b62	soc/sofware: remove libdyld	2015-11-10 12:21:23 +01:00
Florent Kermarrec	f72e172ac3	soc/software: remove libunwind	2015-11-10 12:16:34 +01:00
Florent Kermarrec	85e6716b6b	litex/build/xilinx/programmer: remove UrJTAG and Adept	2015-11-10 12:01:25 +01:00
Florent Kermarrec	a775672314	litex: get verilator simulation working and add sim target as example	2015-11-07 23:51:37 +01:00
Florent Kermarrec	6a0f85dc42	litex: reorganize things, first work working version	2015-11-07 17:48:55 +01:00
Florent Kermarrec	637634f312	import migen in litex/gen	2015-11-07 12:22:32 +01:00
Florent Kermarrec	b028569784	import misoc in litex/soc	2015-11-07 12:19:30 +01:00