Florent Kermarrec
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387cf90cf8
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host and device communicate with OOB, now need to fix ctrl
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2014-09-26 23:30:30 +02:00 |
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Florent Kermarrec
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01da43ecb2
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reset and lock of PLL OK. We see OOB signals on the link but they are not decoded by the device.
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2014-09-26 22:31:32 +02:00 |
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Florent Kermarrec
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dfbec91a62
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add modelsim simulation and start fixing init
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2014-09-26 17:05:05 +02:00 |
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Florent Kermarrec
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c008dfdd98
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clean up (thanks to Sebastien)
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2014-09-25 14:17:25 +02:00 |
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Florent Kermarrec
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435bc22fa0
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integrate phy in test design and start fix syntax errors
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2014-09-24 16:07:34 +02:00 |
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Florent Kermarrec
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18009303ae
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instanciate device or host controller
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2014-09-24 14:00:00 +02:00 |
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Florent Kermarrec
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f436069a04
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create sata clock (sata_tx/2 for a 32 bits data path)
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2014-09-24 13:55:06 +02:00 |
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Florent Kermarrec
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fa509b3365
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rearrange code and remove datapath for now
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2014-09-23 23:03:32 +02:00 |