Hardware/litex
1
0
Fork 0
mirror of https://github.com/enjoy-digital/litex.git synced 2025-01-04 09:52:26 -05:00
Code Issues Projects Releases Packages Wiki Activity
7352 commits 42 branches 14 tags 31 MiB
Commit graph

2 commits

Author SHA1 Message Date
Florent Kermarrec
71a91eac15 test: Rename test_boot.py to test_cpu.py. 2021-10-26 08:35:16 +02:00
Navaneeth Bhardwaj
2886fe1701
Add bios test mode for CI (#1076) 
* Add bios test mode for CI

This enables to test the booting of each CPU configurations with the bios in Verilator simulation.
 2021-10-24 12:08:58 +02:00