Commit graph

15 commits

Author SHA1 Message Date
Florent Kermarrec
9960ca010a test on hardware and clean up/fix 2015-01-23 13:27:40 +01:00
Florent Kermarrec
ef440274fe simplify LiteScopeLA export (use vns from platform on atexit) 2015-01-23 09:52:20 +01:00
Florent Kermarrec
6003b8af02 use LiteScope (replace Miscope) 2015-01-23 01:34:59 +01:00
Florent Kermarrec
4e3190120e fix build with upstream Migen/MiSoC 2015-01-22 21:23:14 +01:00
Florent Kermarrec
b299116ace replace SATAX with sata_genx 2015-01-22 17:15:12 +01:00
Florent Kermarrec
8d16a166c4 change submodules/specials/clock_domains syntax 2015-01-22 16:04:53 +01:00
Florent Kermarrec
3346bf8b2b frontend: simplify 2015-01-22 10:45:11 +01:00
Florent Kermarrec
c9761be54f command: remove success/failed redundancy (keep failed) 2015-01-22 00:23:11 +01:00
Florent Kermarrec
ff0c8e3d22 add PacketBuffer, simplify architecture and reduce ressource usage 2015-01-22 00:13:19 +01:00
Florent Kermarrec
2bb9c6b649 add verilog backend to use the core with a "standard" flow 2015-01-19 20:38:48 +01:00
Florent Kermarrec
d84ae7c80c clean up 2015-01-19 18:13:43 +01:00
Florent Kermarrec
6de7e15a0c refactor code 2015-01-17 13:22:52 +01:00
Florent Kermarrec
6f2c7a236c add support of identify device command 2015-01-17 02:35:25 +01:00
Florent Kermarrec
175618bcb4 use csr_data_width of 32 to speed up data mila upload 2015-01-16 20:57:01 +01:00
Florent Kermarrec
083bd54121 global clean up
- remove initial sims
- remove SATAPHYDeviceCtrl
- rename to LiteSATA
- rename test to bist
2015-01-16 20:26:15 +01:00
Renamed from targets/test.py (Browse further)