Now we only generate multilane bitfield documentation when the CSR has
fields, and the smallest field is less than 8bit long. As this is when
we start running into space problems with the field names.
In cases when each CSR bit has a name and we use CSR with more than 8
bits, the register diagram quickly becomes crowded and hard to read.
With this patch we split the register into multiple lanes of 8 bits
each.
This allows generating SVD export files during the build as we are already doing for .csv or .json.
Use with Builder:
builder = Builder(soc, csr_svd="csr.svd")
Use with target:
./arty.py --csr-svd=csr.svd
Previously, we were accessing the `soc.soc_interrupt_map` property in
order to be able to enumerate the interrupts. This has been subsumed
into a more general `irq` object that manages the interrupts.
Use `soc.irq.locs` instead of `soc.soc_interrupt_map` as the authority
on interrupts for both doc and export.
This fixes#385.
Signed-off-by: Sean Cross <sean@xobs.io>
It was suggested that we should move svd generation into `export`,
alongside the rest of the generators such as csv, json, and h. This
performs this move, while keeping a compatible `generate_svd()` function
inside `soc/doc/`.
Signed-off-by: Sean Cross <sean@xobs.io>
The sphinx toctree was behaving oddly, and so previously we were
ignoring it completely. This patch causes it to be used correctly,
which removes the need for double-including various sections.
Signed-off-by: Sean Cross <sean@xobs.io>
lxsocdoc enables automatic documentation of litex projects, including
automatic generation of SVD files.
This merges the existing lxsocdoc distribution into the `soc/doc` directory.
Signed-off-by: Sean Cross <sean@xobs.io>
