Hardware
/
litex
mirror of https://github.com/enjoy-digital/litex.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity
133 Commits 37 Branches 13 Tags 47 MiB
Commit Graph

1 Commits

Author SHA1 Message Date
Sebastien Bourdeauducq a5bd111370 fhdl/verilog: clean up signal classification and support memory descriptions 2012-01-27 16:54:48 +01:00